1-35
Disc playback is NG (DVD).
Is PLL locked?
(Refer to waveforms.)
Check signal process
system following to IC402.
Check peripheral circuits
of IC401 and IC604.
Does pulse of
L = 1.65V and H = 3.3V
develop at pin 131 and
L = 0V and H = 1.65V
develop at pin 132
of IC401?
Does RF output
higher than 1 V(p-p)
develop at pin 30 (TP502)
of IC502?
Check IC502.
Lens cleaning.
Pickup mechanism
replacement
Check peripheral circuits of
IC401 and IC604.
Pin 43 of IC502 = 2.4V
Pin 44 of IC502 = 3.0V
Check peripheral circuits
of IC502 and IC401.
7
Y
N
N
N
N
Y
Y
Y
DVD RF signal
Pin 30 (TP502) of IC502
V : 500 mV/div
H : 50 ns/div
DVD RF signal
DVD RF signal
Pin 30 (TP502) of IC502
DVD PLCK
Pin 117 (TP409) of IC401
CH1 : TP502 DVDRF 500 mV/div
CH2 : TP409 DVDPLCK 5 V/div
50 ns/div
DVD playback waveform
CD RF signal
Pin 30 (TP502) of IC502
V : 500 mV/div
H : 100 ns/div
CD RF signal
CD RF signal
Pin 30 (TP502) of IC502
CD PLCK
Pin 117 (TP409) of IC401
CH1 : TP502 CDRF 500 mV/div
CH2 : TP409 CDPLCK 5 V/div
100 ns/div
CD playback waveform
Fig. 1-3-16
Fig. 1-3-17
Fig. 1-3-19
Fig. 1-3-18
Fig. 1-3-20
PLL works as a servo loop to generate a clock signal for reading RF
signal binary data. With the PLL locked, the eye pattern is identified
clearly when triggered with the read clock PLCK.
Summary of Contents for SD-1300A
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Page 57: ...Fig 3 4 5 4 3 3 Front Display Power Switch Block Diagram 3 9 3 10 ...
Page 58: ...m Fig 3 4 6 4 4 Main Block Diagrams 4 4 1 Servo System Block Diagram 3 11 3 12 ...
Page 59: ...Fig 3 4 7 4 4 2 Logical System Block Diagram 3 13 3 14 ...
Page 71: ...5 3 2 Main Circuit Diagram Fig 3 5 5 3 29 3 30 3 31 3 32 ...
Page 73: ...3 34 1 3 4 A B C D E G 2 5 F 5 4 Motor System Circuit Diagram Fig 3 5 7 ...
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Page 89: ...4 6 5 PARTS LIST ...
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