Toshiba R6472 - DVD±RW Drive - IDE, Specifications

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TS-L532A (SD-R6472) Rev.1.1
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6.2.3. Timing of Host Interface (Multi word DMA)
Figure 10 shows the timings of the host interface Multi word DMA.
*1: In all timing diagrams, the low line indicator is negated and the upper line indicators asserted.
Figure 10 Timings of Host Interface (Multi Word DMA Mode 2)
Multi word DMA
timing parameters min (ns) max (ns)
Min time (ns) Max time (ns)
t0 Cycle time 120
tD DIOR-/DIOW- 16 bit 70
tE DIOR- data access ---
tF DIOR-data hold 5
tZ DMACK-to tristate 25
tG DIOR/DIOW-data setup 20
tH DIOW-data hold 10
tl DMACK to DIOR-/DIOW- setup 0
tJ DIOR-/DIOW- to DMACK hold 5
tKr DIOR- negated pulse width 25
tKw DIOW- negated pulse width 25
tLr DIOR- to DMARQ delay 35
tLw DIOW- to DMARQ delay 35
t0
tl
tZ
DIOR-/DIOW-*1
Write
DD0-15
tK tD
tL
tJ
tE
tF
tG tH
Read
DD0-15
DMACK-*1
DMARQ
tG