TS-L532A (SD-R6472) Rev.1.1
16 / 28
6.2.2. Timing of Host Interface (PIO)
Figure 9 shows the timings of the host interface.
*1: In all timing diagrams, the low line indicator is negated and the upper line indicators asserted.
Figure 9 Timings of Host Interface (PIO mode4)
PIO timing parameters min (ns) max (ns)
Min Time (ns)
Max Time (ns)
t0
Cycle time
120
t1
Address valid to DIOR/DIOW-setup
25
t2
DIOR/DIOW-pulse wide
70
t2i
DIOR/DIOW-recovery time
25
t3
DIOW-data setup
20
t4
DIOW-data hold
10
t5
DIOW-data setup
20
t6
DIOR-data hold
5
t6Z
DIOR-data tristate
30
t9
DIOR/DIOW-to address valid hold
10
tRD
Read Data Valid to IORDY active
0
tA
IORDY setup
35
tB
IORDY pulse wide
1250
t0
t1
t2
t9
t2i
t3
t4
t5
tA
tB
tRD
Address valid
DIOR-/DIOW-*1
Write data valid
Read data valid
IORDY
t6Z
t6
Summary of Contents for R6472 - DVD±RW Drive - IDE
Page 16: ...TS L532A SD R6472 Rev 1 1 10 28 Unit mm Figure 5 1 External Dimensions ...
Page 17: ...TS L532A SD R6472 Rev 1 1 11 28 Unit mm Figure 5 2 External Dimensions ...
Page 19: ...TS L532A SD R6472 Rev 1 1 13 28 Figure 6 Configuration ...
Page 33: ...TS L532A SD R6472 Rev 1 1 27 28 Annex 1 ...