Programming Model
TVP4020
Programmers Reference Manual
18
The interrupt handler could then be
if (*IntFlags & DMA Flag bit) {
reset DMA Flag bit in IntFlags
send wake up to main task
}
Interrupts are complicated and depend on the facilities provided by the
host operating system. The above pseudocode only hints at the system
details.
This scheme frees the processor for other work while DMA is being
completed. Since the overhead of handling an interrupt is often quite
high for the host processor, the scheme should be tuned to allow a
period of polling before sleeping on the interrupt.
3.2.5
Output FIFO and Graphics Processor FIFO Interface
To read data back from P
ERMEDIA
an output FIFO is provided. Each entry
in this FIFO is 32-bits wide and it can hold tag or data values. Thus its
format is unlike the input FIFO whose entries are always tag/data pairs
(we can think of each entry in the input FIFO as being 41 bits wide – 9
bits for the tag and 32 bits for the data). The type of data written by
P
ERMEDIA
to the output FIFO is controlled by the FilterMode register. This
register allows filtering of output data in various categories including the
following:
•
Depth: output in this category results from an image upload of the
Depth buffer.
•
Stencil: output in this category results from an image upload of the
Stencil buffer.
•
Color: output in this category results from an image upload of the
framebuffer.
•
Synchronization: synchronization data is sent in response to a Sync
command.
The data for the FilterMode register consists of 2 bits per category. If the
least significant of these two bits is set (0x1) then output of the register
tag for that category is enabled; if the most significant bit is set (0x2)
then output of the data for that category is enabled. Both tag and data
output can be enabled at the same time. In this case the tag is written
first to the FIFO followed by the data. The FilterMode register is
described in more detail in section §5.15.
For example, to perform an image upload from the framebuffer, the
FilterMode register should have data output enabled for the Color
category. Then, the rectangular area to be uploaded should be
described to the Rasterizer. Each pixel that is read from the framebuffer
will then be placed into the output FIFO. If the output FIFO becomes full,
Summary of Contents for TVP4020 PERMEDIA 2
Page 1: ...Texas Instruments TVP4020 PERMEDIA 2 Programmer s Reference Manual Issue 4 ...
Page 284: ...TVP4020 Programmers Reference Manual A Gouraud Shaded Triangle 275 ...
Page 292: ...TVP4020 Programmers Reference Manual Register Tables 283 ...
Page 314: ...TVP4020 Programmers Reference Manual Index 305 ...
Page 315: ...Index TVP4020 Programmers Reference Manual 306 Index ...
Page 323: ...Index TVP4020 Programmers Reference Manual 314 ...