Texas Instruments TPS6593-Q1, User Manual

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5.2 State Transitions
As shown in Figure 5-1 , there are various triggers that can enable a state transition between configured states
and hardware states. Table 5-1 describes each trigger and its associated state transition from highest priority to
lowest priority.
Table 5-1. State Transition Triggers
Trigger PFSM Current State PFSM Destination State Power Sequence Executed
Immediate Shutdown STANDBY, ACTIVE SAFE TO_SAFE_SEVERE
OFF Request
(1)
ACTIVE STANDBY TO_STANDBY
ON Request
(2)
STANDBY ACTIVE TO_ACTIVE
GPIO3 Rises ACTIVE ACTIVE EN_SPI
GPIO3 Falls ACTIVE ACTIVE DIS_SPI
GPIO4 Rises ACTIVE ACTIVE EN_CRC
GPIO4 Falls ACTIVE ACTIVE DIS_CRC
GPIO10 Rises ACTIVE ACTIVE UPDATE_I2C1_2C
GPIO10 Falls ACTIVE ACTIVE UPDATE_I2C1_28
Always True
(3)
SAFE SAFE_RECOVERY
No sequence is excuted, device exits
PFSM
(1) OFF Request trigger is named FORCE_STANDBY.
(2) ON Request trigger is named SU_ACTIVE.
(3) Trigger from SAFE to SAFE RECOVERY always occurs once transitioned to SAFE state. This allows the device to exit the PFSM and
transition to the hardware states and check that the error is removed before the next startup.
5.3 Power Sequences
Since this NVM is intended as a starting point for programmable applications, none of the power sequences
include any change of output resources, except for the TO_SAFE_SEVERE sequence. As shown in Figure 3,
this sequence will shut down all power rails in the event that any were enabled through I2C or SPI.
All other power sequences consist of register writes only to enable or disable interface features. In the case of
the TO_ACTIVE and TO_STANDBY sequences, the device is activating and deactivating internal components,
clocks, etc. Details on
Activate and Deactivate commands can be found in the Scalable PMIC's GUI User’s
Guide .
When a severe error causes the TO_SAFE_SEVERE sequence to execute, the immediate shutdown will disable
the clocks and switching of the BUCKs first and rely on the pulldown resistors of the BUCKs and LDOs to
discharge the rails. This is to prevent any damage of the PMICs in case of over voltage on VCCA or thermal
shutdown. The sequence is shown in
Figure 5-2 .
www.ti.com Pre-Configurable Finite State Machine (PFSM) Settings
SLVUC24 – MAY 2021
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Programmable PMICs: TPS6593-Q1 Default Configuration for TPS6593EVM 17
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