3
1
5
1
1
5
4
1
1
1
6
1
2
1
7
1
1
C13
100pF
8
7
6
3
2
1
130
R2
TP1
8
TP1
6
C17
0.33uF
54.9
R4
4.02k
R23
TP2
1
TP2
0
R25
TP5
8
10.0k
R18
TP8
4
2.21
R14
2.21
R1
1
TP1
R5
10
Not
u
sed
2.21
R20
C18
1uF
TP7
R15
0
TP1
3
TP1
9
C24
R10
1
+
470uF
C15
R21
200k
TP9
8.25k
R6
C25
TP3
R26
100k
S
e
e
S
heet
2
for
3
rd
phase
C14
TP6
TP1
7
2.2uF
C7
C6
4.7uF
TP1
0
TP1
5
2.21
R8
R12
0
C2
10uF
C8
10uF
TP1
1
R17
10uF
C9
C21
C10
10uF
TP1
4
10uF
C5
1nF
C1
+
C20
470uF
R24
0
S
e
e
S
heet
5
for
FREQ
selection
C26
100pF
15.4k
R22
R13
C22
1uF
R3
S
e
e
S
heet
3
for
G
PU
Vcore
TP2
2
C23
1uF
15.4k
R7
S
e
e
S
heet
5
C
PU
OCP
selection
and
OS
R
setting
0.36uH
L2
TP4
TP2
+
470uF
C16
20.0k
R16
RT
2
100k
S
e
e
S
heet
5
for
O
CP
selection
and
OS
R
setting
42.2k
R1
RT
1
100k
0.36uH
L1
10uF
C3
C4
10uF
+
C19
470uF
C1
1
10uF
C12
1nF
TP1
2
G
P
U
phase:
See
sheet
3
CPU
thrid
phase:
See
sheet
2
G
P
U
O
C
P
selection:
See
sheet
5
CPU
O
C
P
selection:
See
sheet
5
G
P
U
S
w
itching
frequency
selection:
See
sheet
5
CPU
S
w
itching
frequency
selection:
See
sheet
5
G
P
U
O
S
R
/USR
selection:
S
ee
sheet
5
S
e
e
S
heet
5
for
FREQ
selection
CP
U
a
nd
G
P
U
C
ontrol,
1st
and
2nd
Phase
C
PU
Po
w
e
r
