![background image](http://html1.mh-extra.com/html/texas-instruments/tps59650evm-753/tps59650evm-753_user-manual_1095634034.webp)
TPS59650EVM
CPU Dynamic VID: Set VID-Fast/Fast
Test condition: 12 Vin, 1.23V/1A
GPU 1 Operation
CH1: CSW1
CH3: 1.23Vcore_G
CH4: VDIO
TPS59650EVM
GPU Dynamic VID: Set VID-Slow/Slow
CH1: GSW1
CH3: 1.23Vcore_G
CH4: VDIO
Test condition: 12 Vin, 1.23V/1A
GPU 1 Operation
TPS59650EVM
GPU Dynamic VID: Set VID-Decay/Fast
Test condition: 12 Vin, 1.23V/1A
GPU 1 Operation
CH1: GSW1
CH3: 1.23Vcore_G
CH4: VDIO
CH1: DYN_G
TPS59650EVM
GPU Output Load Insertion with OSR/USR
least reduction
Test condition: 12 Vin, 1.23V/0A-18A
GPU 1 Phase on board dynamic load
CH2: GSW1
CH3: 1.23Vcore
Performance Data and Typical Characteristic Curves
www.ti.com
Figure 66. GPU1 Dynamic VID:SetVID-Slow/Slow
Figure 67. GPU1 Dynamic VID:SetVID-Fast/Fast
Figure 68. GPU1 Dynamic VID:SetVID-Decay/Fast
Figure 69. GPU1 Output Load Insertion with OSR/USR
OFF
34
Using the TPS59650EVM-753 Intel™ IMVP-7 3-Phase CPU/2-Phase GPU
SLUU896 – March 2012
SVID Power System
Submit Documentation Feedback
Copyright © 2012, Texas Instruments Incorporated