TLV1544 to TMS320C50
4-10
Operation
4.4
TLV1544 to TMS320C50
Figure 4–6 is the schematic diagram showing the hardware connections be-
tween the TLV1544 and the TMS320C50.
Figure 4–6. Schematic Diagram
16
A3
CSTART
GND
INV CLK
FS
REF–
REF+
CS
A2
A1
VCC
A0
EOC
I/O CLK
DATA IN
DATA OUT
1
2
3
4
5
6
7
8
15
14
13
12
11
10
9
0.01
µ
F
4.7
µ
F
0.01
µ
F
A0
A1
A2
A3
Analog
Inputs
0.01
µ
F
TLV1544
INT3
CLKX
DX
DR
XF
FSR
FSX
CLKR
See Note
45
104
109
43
106
124
46
40
TMS320C50
DSP
VCC = 5 V
VCC
NOTE: Software programs using interrupt processing may need the inverter and the connection shown in dotted lines. In
programs using wait states, EOC is not required.
Summary of Contents for TLV1544EVM
Page 2: ...Printed in U S A 08 98 SLAU014...
Page 8: ...vi...
Page 16: ...1 6 Overview...
Page 19: ...PCB Layout 2 3 Physical Description Figure 2 2 PCB Layout...
Page 20: ...PCB Layout 2 4 Physical Description Figure 2 3 PCB Layout...
Page 21: ...PCB Layout 2 5 Physical Description Figure 2 4 PCB Layout...
Page 22: ...PCB Layout 2 6 Physical Description Figure 2 5 PCB Layout...
