www.ti.com
High-Level TLK10232 Device Configuration
After selecting the Operating Mode settings, select the Clock and Rate Configuration window (
Figure 6
)
from the Selection Window tree. All of the standard clock and rate controls listed in the TLK10232
datasheet are implemented using a quick reference lookup table. The Clock and HS Serial Data Rate
options are operating-mode specific, requiring configuration of the operating mode before configuring the
clock so the correct options are presented. Only the Reference Clock Frequency and HS Serial Data Rate
selections are required. All other HS and LS PLL multipliers and rate settings are configured in the
TLK10232 register to support that mode.
The selection of which reference clock is used to how to configure the HS Recovered Byte Clock for the
selected channel can also be made from this window.
Selecting the Others button allows direct control the HS/LS PLL multiplier and rate registers. Entering the
Ref Clock Frequency and HS/LS Serial Data Rates displays the Output Clock Frequency calculations for
reference, even though they do not have any direct register configuration value.
Save any changes to the Clock and Rate Configuration window.
Figure 6. TLK10232 EVM GUI High-Level Device Clock and Rate Configuration
Not all configuration windows will be displayed in this document. Work through the various windows
making other necessary configuration settings.
9
SLLU181 – June 2013
TLK10232 Dual-Channel XAUI/10GBASE-KR Transceiver with Crosspoint
Evaluation Module (EVM) Graphical Users Interface User’s Guide
Submit Documentation Feedback
Copyright © 2013, Texas Instruments Incorporated