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Low-Level TLK10232 Device Configuration
The primary device needed to read/write registers is the TLK10232. Expanding the TLK10232 in the tree
shows Board1 and Board2 options. Select the appropriate board number that the TLK10232 is located
and expand that to show the global and channel specific registers. All registers are handled individually for
maximum configurability.
Navigate to the desired register and click the register name in the tree. This loads the bit-specific register
information into the Register Data window and shows the last read/write value of the register in both hex
and bit format. The names of the bits are also displayed for easier reference. The Register Description box
displays the description information from the TLK10232 datasheet for the chosen register, helping to
understand the significance of a particular register bit value without having a copy of the datasheet.
To read a register value, simply click the register to read and then click the Read Reg button. The new
value is returned.
To write a register with a new value, click the register name to load the register information into the
Register Data window. Click the individual bit fields to change the new values from 1 to 0 or vice versa. A
check mark indicates a 1 value and an open box indicates a 0 value. The HEX value of the register is
automatically updated. Click the Write Reg button to write the new value to the TLK10232 register.
Retyping the HEX value directly into the Write Data field also writes the value to the register when the
Write Reg button is pressed and the individual bit fields are updated for the specific HEX value.
If a chosen register has the Write Reg information disabled and grayed out, then that register is read only.
The GUI knows the register communication protocol of all the different registers and writes to the register
in the required mode. If a TCA6424 register is read or written, the GUI executes that transaction using the
I
2
C protocol. The TLK10232 registers are MDIO Clause 45 Protocol, and the Spartan-6 registers (if using
the legacy TLK10002 EVM FPGA daughterboard) are MDIO Clause 22 protocol.
Also, the PHY and Device Address information is used from the various input fields associated with the
various board address controls. It is important to ensure that the PRTAD[4:1] address is set appropriately
for the boards, and the I
2
C address also matches the addresses set in hardware. The EVM board ships
with PRTAD[4:1] = 4’b0000 and the I
2
C Address for the TCA6424 = 0x22.
Figure 10. TLK10232 EVM GUI Low-Level Device Configuration
13
SLLU181 – June 2013
TLK10232 Dual-Channel XAUI/10GBASE-KR Transceiver with Crosspoint
Evaluation Module (EVM) Graphical Users Interface User’s Guide
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