SPI_CS[x] (In)
SPI_SCLK (In)
SPI_SCLK (In)
SPI_D[x] (SOMI, Out)
Bit n-1
Bit n-2
Bit n-3
Bit n-4
Bit 0
PHA=0
EPOL=1
POL=0
POL=1
8
3
7
6
2
1
2
1
SPI_CS[x] (In)
SPI_SCLK (In)
SPI_SCLK (In)
SPI_D[x] (SOMI, Out)
Bit n-1
Bit n-2
Bit n-3
Bit 1
Bit 0
PHA=1
EPOL=1
POL=0
POL=1
8
3
6
6
2
1
2
3
1
6
6
9
6
9
3
AM3359, AM3358, AM3357, AM3356, AM3354, AM3352
SPRS717H – OCTOBER 2011 – REVISED MAY 2015
Figure 7-89. SPI Slave Mode Transmit Timing
Copyright © 2011–2015, Texas Instruments Incorporated
Peripheral Information and Timings
217
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