Usage Notes and Known Design Exceptions to Functional Specifications
Advisory 1.0.11
USB: Attached Non-compliant USB Device that Responds to Spurious Invalid
Short Packet May Lock Up Bus
Revisions Affected
1.0
Details
The integrated USB PHY (analog transceiver) has a timing error that turns on its receiver
too early and occasionally detects the end of its own transmit data as receive data. This
causes the USB controller to transmit an invalid short packet. Normally this invalid short
packet would be ignored by the attached USB device and the data transmission would
continue as expected.
At least one mass storage class USB device has been found to be non-compliant to the
USB specification, by responding to this packet. This non-compliant response (NACK) to
the invalid short packet violates USB protocol and causes the bus to hang.
Poor signal integrity of the differential signal pair used to connect the attached USB
device may contribute to this issue. Impedance discontinuities and mismatched
terminations on the differential signal pair may cause reflections to propagate longer
than expected, which allows the transceiver to detect these reflections of its own transmit
data as receive data.
Workarounds
There is no workaround for this issue.
To prevent an unexpected response to any invalid short packets, attach only USB
devices that are compliant with the USB specification.
To minimize reflections, it is also recommended that the USB DP and DM signals are
routed as a 90-
Ω
differential pair transmission line with minimum impedance
discontinuities and proper terminations.
Advisory 1.0.12
UART: Extra Assertion of FIFO Transmit DMA Request, UARTi_DMA_TX
Revisions Affected
2.1, 2.0, 1.0
Details
A UART transmit request with a DMA THRESHOLD default configuration of 64 bytes
results in an extra DMA request assertion when the FIFO TX_FULL is switched from
high to low.
Workarounds
To avoid an extra DMA request assertion, use:
TX_THR TRIGGER_LEVEL
≤
63 (TX FIFO Size - 1).
18
SPRZ360F – October 2011 – Revised November 2013
Sitara™ AM335x ARM
®
Cortex™-A8 Microprocessors (MPUs) (Silicon
Revision 2.1, 2.0, 1.0)
Copyright © 2011–2013, Texas Instruments Incorporated
