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McSPI Register Manual
Table 20-29. Register Call Summary for Register MCSPI_IRQENABLE
McSPI Functional Description
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McSPI Basic Programming Model
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McSPI Configuration and Operations Example
McSPI Register Manual
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Table 20-30. MCSPI_WAKEUPENABLE
Address Offset
0x20
Physical Address
0x4809 8020
Instance
MCSPI1
0x4809 A020
MCSPI2
0x480B 8020
MCSPI3
0x480B A020
MCSPI4
Description
The wake-up enable register allows to enable/disable the module internal sources of wake-up on event-by-event
basis.
Type
RW
Write Latency
Immediate
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
Reserved
WKEN
Bits
Field Name
Description
Type
Reset
31:1
Reserved
Reads return 0
RW
0x00000000
0
WKEN
Wake-up functionality in slave mode when an active control signal
RW
0
is detected on the spim_cs line programmed in the field
0x0:
The event is not allowed to wake-up the system,
even if the global control bit
MCSPI_SYSCONF[ENAWAKEUP] is set.
0x1:
The event is allowed to wake-up the system if the
global control bit MCSPI_SYSCONF[ENAWAKEUP]
is set.
Table 20-31. Register Call Summary for Register MCSPI_WAKEUPENABLE
McSPI Functional Description
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McSPI Register Manual
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3041
SWPU177N – December 2009 – Revised November 2010
Multichannel SPI
Copyright © 2009–2010, Texas Instruments Incorporated