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McSPI Functional Description
Autogating of the module interface clock and functional clock stops when the following conditions are met:
•
In master mode, an internal access occurs.
•
In slave mode, an internal access occurs or the McSPI is selected by the external master.
20.5.7.2 Idle Mode
At the PRCM module level, when all conditions are met to shut off the CORE_48M_FCLK or
CORE_L4_ICLK output clocks (see
, Power, Reset, and Clock Management, for details), the
PRCM module automatically launches a hardware handshake protocol to ensure that the McSPI is ready
to have its clocks switched off. Namely, the PRCM module asserts an idle request to the McSPI.
Although this handshake is completely hardware-oriented and out of software control, the method in which
the McSPI module acknowledges the PRCM idle request is configurable through the
McSPI.SYSCONFIG[4:3] SIDLEMODE bit.
The following list details the settings of the SIDLEMODE bit and the related acknowledgment modes:
•
Force-idle mode (the SPIm.
[4:3] SIDLEMODE bit set to 0x0): the McSPI module
acknowledges unconditionally the idle request from the PRCM module, regardless of its internal
operations. This mode must be used carefully in this case because it does not prevent the loss of data
when the clock is switched off.
•
No-idle mode the (SIDLEMODE bit set to 0x1): The McSPI module never acknowledges an idle
request from the PRCM module and is safe from a module point of view because it ensures that the
clocks remain active. However, it is not efficient to save power because it does not allow the PRCM
output clock to be shut off and thus the power domain to be set to a lower power state.
•
Smart-idle mode (the SIDLEMODE bit set to 0x2): The McSPI module acknowledges the idle request,
basing its decision on its internal activity. Namely, the acknowledge signal is asserted only when all
pending transactions, IRQs, or DMA requests are treated. This is the best approach for an efficient
system power management.
When configured in smart-idle mode, the McSPI module also offers an additional granularity on the
CORE_48M_FCLK and CORE_L4_ICLK gating. The SPIm.SYSCONFIG[9:8] CLOCKACTIVITY bit field
determines which clock shuts down (the CORE_48M_FCLK, the CORE_L4_ICLK, neither clock, or both
clocks).
The CLOCKACTIVITY setting is used internally to McSPI to determine on which part of the module the
conditions to acknowledge the PRCM idle request are tested. For example, if CORE_48M_FCLK is not
shut down on a PRCM idle request, McSPI considers only CORE_L4_ICLK and the associated pending
activities before acknowledging the request.
Some McSPI features are associated with CORE_L4_ICLK and others with CORE_48M_FCLK. Using the
CLOCKACTIVITY bit field along with the smart-idle mode ensures that the features associated with the
clock that remains active are always enabled, even if McSPI acknowledges an idle request.
The following list details CLOCKACTIVITY settings and the associated features:
•
CLOCKACTIVITY set to 00: ICLK OFF and FCLK OFF, both ICLK and FCLK are taken into account for
generating the acknowledge. This setting also means that both FCLK and ICLK are likely to be shut
down on a PRCM idle request.
•
CLOCKACTIVITY set to 01: ICLK ON and FCLK OFF, ICLK is not shut down on a PRCM idle request;
only FCLK is concerned.
•
CLOCKACTIVITY set to 10: ICLK OFF and FCLK ON, FCLK is not shut down on a PRCM idle request;
only ICLK is concerned.
•
CLOCKACTIVITY set to 11: ICLK ON and FCLK ON, none of the clocks are shut down. This means
McSPI can potentially acknowledge the idle request without checking the internal functionalities linked
to its clocks.
3009
SWPU177N – December 2009 – Revised November 2010
Multichannel SPI
Copyright © 2009–2010, Texas Instruments Incorporated
