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McSPI Functional Description
The interrupt status register SPIm.
is updated with the event causing the wake-up;
the wake-up event at the origin of the transition to normal mode is converted to its corresponding interrupt
request or DMA request. The module is fully operational.
20.5.7.2.3 Force-Idle Mode
Force-idle mode is enabled and exited as follows:
•
Force-idle mode is enabled when the SPIm.
[4:3] SIDLEMODE field is set to 0x0.
In force-idle mode, McSPI responds unconditionally to the idle request by deasserting unconditionally
the interrupt and DMA request lines, if asserted. In addition, the wake-up capability is totally inhibited
even if both the SPIm.
[0]
WKEN bits are set.
The transition from normal mode to idle mode does not affect the interrupt event bits of the
SPIm.
register.
In force-idle mode, the module must be disabled so the interrupt and DMA request lines are likely
deasserted. The interface clock and SPI clock provided to the McSPI can be switched off.
An idle request during an SPI data transfer can lead to an unexpected and unpredictable result. The
software must avoid such a request.
•
The module exits force-idle mode through the idle and wake-up hardware handshake protocol.
The module is fully operational. The interrupt and DMA request lines are optionally asserted one clock
cycle later.
3011
SWPU177N – December 2009 – Revised November 2010
Multichannel SPI
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