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Bus
Keeper
EN
Direction
0: Input
1: Output
P2SEL.1
1
0
P2DIR.1
P2IN.1
P2IRQ.1
D
EN
Module X IN
1
0
Module X OUT
P2OUT.1
Interrupt
Edge
Select
Q
EN
Set
P2SEL.1
P2IES.1
P2IFG.1
P2IE.1
P2.1/TAINCLK/SMCLK/A1
1
0
DVSS
DVCC
P2REN.1
ADC10AE0.1
Pad Logic
INCHx = 1
To ADC 10
1
MSP430G2744, MSP430G2544, MSP430G2444
SLAS892C – MARCH 2013 – REVISED SEPTEMBER 2014
www.ti.com
6.19.5 Port P2 Pin Schematic: P2.1, Input/Output With Schmitt Trigger
Table 6-19. Port P2 (P2.1) Pin Functions
CONTROL BITS OR SIGNALS
(1)
PIN NAME (P2.x)
x
y
FUNCTION
P2DIR.x
P2SEL.x
ADC10AE0.y
P2.1
(2)
(I/O)
I: 0; O: 1
0
0
Timer_A3.INCLK
0
1
0
P2.1/TAINCLK/
1
1
SMCLK/A1
SMCLK
1
1
0
A1
(3)
X
X
1
(1)
X = Don't care
(2)
Default after reset (PUC, POR)
(3)
Setting the ADC10AE0.y bit disables the output driver and the input Schmitt trigger to prevent parasitic cross currents when applying
analog signals.
54
Detailed Description
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