Texas Instruments LMP92066, User Manual

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SELECTOR BLOCK DESCRIPTION FACTORY SETTING
J3 VDD source:
1-2: External via SUPPLY block
2 - 3
2-3: Provided by J2-28
J4 VIO source:
1-2: External via SUPPLY block
2 - 3
2-3: Provided by J2-16
J5 VDDB source:
1-2: External via SUPPLY block
2 - 3
2-3: Provided by J2-28
J6 VSSB source:
1-2: External via SUPPLY block
2 - 3
2-3: Local ground (GND)
J7 I
2
C bus slave address A1 input control:
No Shunt – A1 = N.C.
1-2 – A1 = HI
The I
2
C slave address of the LMP92066
2-3 – A1 = LO
is set to A1 = LO, A0 = LO. This
corresponds to the I
2
C slave address =
J8 I
2
C bus slave address A1 input control:
0111111 = 0x3F
No Shunt – A0 = N.C.
1-2 – A0 = HI
2-3 – A0 = LO
J9 DRVEN0 manual control:
DRVEN0 is forced LO by a shunt,
No Shunt – DRVEN0 controlled by J2-19 input
disabling the FETDRV0 output. Remove
1-2 – DRVEN0 forced HI
the shunt to enable FETDRV0.
2-3 – DRVEN0 forced LO
J10 DRVEN1 manual control:
DRVEN1 is forced LO by a shunt,
No Shunt – DRVEN1 controlled by J2-20 input
disabling the FETDRV0 output. Remove
1-2 – DRVEN1 forced HI
the shunt to enable FETDRV1.
2-3 – DRVEN1 forced LO
USB to I
2
C interface – USB2Any
USB2Any is provided as an interface between the PC and the LMP92066EVM. This interface is user
controlled via the application LMP92066EVM GUI.
USB2Any is provided as either enclosed or unenclosed unit.
The LMP92066EVM plugs in directly to USB2Any. For in-system evaluation of the LMP92066, a ribbon
cable is provided for connecting of USB2Any to a target system equipped with a suitable header.
Figure 1. USBAny
4 LMP92066 Dual Temperature-Controlled DAC Evaluation Module SNAU153 – MARCH 2014
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