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SV600875A1_2_LMP92066_Circuit.SchDoc

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LMP92066 EVM

Project Title:

Designed for:

Public Release

Assembly Variant:

[No Variations]

2013

Drawn By:
Engineer:

Not shown in title block
Tom D omanski

Texas I nstruments and/or its licensors do not warrant the accuracy or completeness of this specification or any information contained therein. Texas I nstruments and/or its licensors do not
warrant that this design will meet the specifications, will be suitable for your application or fit for any particular purpose, or will operate in an implementation. Texas I nstruments and/or its
licensors do not warrant that the design is production worthy. You should completely validate and test your design implementation to confirm the system functionality for your application.

Unknown revision

SVN Rev:

SV600875

Number:

Rev:

DRVEN1

DAP

DAC1

DAC0

SCL

SDA

FETDRV0

FETDRV1

DRVEN0

GND

LMP92066

LMP92066_contech

VDD

VDDB

VIO

DNI

GND

VIO

DRVEN1

DRVEN0

FETDRV1

FETDRV0

DNI

GND

1
2
3

VIO

GND

DAC1

1
2
3

VIO

GND

1
2
3

VIO

GND

1
2
3

J10

VIO

GND

DRVEN0

DRVEN1

ADDRESS SELECTORS

SUPPLY

1754494

VIO

VDDB

GND

TERMINAL BLOCK

10µF

1µF

1000pF

VDD

GND

10µF

1µF

1000pF

C10

VDDB

GND

10µF

C11

1µF

C12

1000pF

C13

VIO

GND

10µF

C14

1µF

C15

1000pF

C16

VSSB

GND

DNI

1.00k

R10

1.00k

5P0

GND

1
2
3

VDD

5P0

3P3

VSSB

OUTPUT DRIVE SELECTORS

SUPPLY SOURCE SELECTORS

6
4
2

10
8

GND

DRVEN0_C

SDA

A0_C

5P0

DRVEN1_C
A1_C
3P3

SCL

SDA

A1_C

A0_C

DRVEN0_C

DRVEN1_C

SCL

GND

3P3

5P0

GND

SDA

DAC0

GND

U2A_30

U2A_29

U2A_26
U2A_24

U2A_8
U2A_6

U2A_2

U2A_14

U2A_1

U2A_5

U2A_7

U2A_13

U2A_7
U2A_5

U2A_1

U2A_29

U2A_2

U2A_6

U2A_8

U2A_14

U2A_24

U2A_26

U2A_30

SH-J3_2-3

SH-J4_2-3

SH-J5_2-3

SH-J6_2-3

SH-J7_2-3

SH-J8_2-3

SH-J9_2-3

SH-J10_2-3

MECH

SUPPLY MATING CONNECTOR

1754504

10µF

www.ti.com

Schematic

Schematic

Figure 11. LMP92066EVM Schematic

SNAU153 – MARCH 2014

LMP92066 Dual Temperature-Controlled DAC Evaluation Module

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Summary of Contents for LMP92066

Page 1: ...Using the LMP92066 Evaluation Module User s Guide Literature Number SNAU153 MARCH 2014 ...

Page 2: ... Software Installation 5 1 2 Kit Assembly 5 1 3 Software Startup 6 1 4 VDACx vs Temperature Sweep 11 2 Schematic 13 2 Table of Contents SNAU153 MARCH 2014 Submit Documentation Feedback Copyright 2014 Texas Instruments Incorporated ...

Page 3: ... C bus controller The only active device on the board is the LMP92066 device The EVM by default is powered from the USB2Any interface board which in turn is powered from the host PC USB port The user can provide external supplies via the SUPPLY terminal block All digital and analog I O is accessible via the dual row headers J1 and J2 CONNECTOR DESCRIPTION Interface to the USB2Amy board 11 SDA I2 C...

Page 4: ...put disabling the FETDRV0 output Remove 1 2 DRVEN0 forced HI the shunt to enable FETDRV0 2 3 DRVEN0 forced LO J10 DRVEN1 manual control DRVEN1 is forced LO by a shunt No Shunt DRVEN1 controlled by J2 20 input disabling the FETDRV0 output Remove 1 2 DRVEN1 forced HI the shunt to enable FETDRV1 2 3 DRVEN1 forced LO USB to I2 C interface USB2Any USB2Any is provided as an interface between the PC and ...

Page 5: ...stall Python 2 7 if it is not already present in the target system 1 2 Kit Assembly The EVM mates directly to the USB2Any via the 30 pin dual row header Note that the EVM header spans the 3 headers on the USB2Any controller board After the boards are plugged in together install the USB cable between the USB2Any and the host PC Ensure that the 3 pin selectors J3 through J10 are in the factory defau...

Page 6: ...gram Files 86 Texas Instruments LMP92066 EVM GUI LMP92066 EVM GUI exe GUI LMP92066 Data Path Control Upon start up the application will search for the USB2Any LMP92066EVM hardware and establish communication When successfully initialized the screen below will be shown Figure 4 LMP92066 EVM GUI 6 LMP92066 Dual Temperature Controlled DAC Evaluation Module SNAU153 MARCH 2014 Submit Documentation Feed...

Page 7: ...ich lets the user set and un set the individual bit fields The new values are set to the device by clicking Write Register button Read Register button will report the state of the selected LMP92066 register Access Level buttons send series of transfers that set the device s memory Access Level The default access level is L0 and it gives only READ access to all internal registers Click L2 prior to ...

Page 8: ...ately to the device left click on the control enter new HEX value and press ENTER Note that device must be in Access Level L2 to allow changes to the internal registers values on this page Currently enabled Access Level is indicated at the top of the page The controls with gray backgrounds are indicators only The 2 Radio Buttons DRVEN0 and DRVEN1 enable disable the FETDRV0 and FETDRV1 outputs of L...

Page 9: ...nfiguration in the text file on the host PC The file names are the date stamps of when the file was created and are stored in C Program Data Texas Instruments LMP92066 EVM GUI Logs EEPROM directory Click Load LUT File A file selection window will appear already preset to the above listed directory Select the file with the name corresponding to the time of save of interest After selecting the file ...

Page 10: ...quivalent temperature C and voltage at VDACx outputs here the assumption is made that the internal DAC reference is 5 V and the DAC itself is ideal The sampling interval can be set with the Sampling Time control STOP terminates the logging At that time a text log file is created in the C Program Data Texas Instruments LMP92066 EVM GUI Logs Datalog directory that contains the plot data At any time ...

Page 11: ... resulting values presented as inputs to DAC0 and DAC1 Start Value and Stop Value controls set the temperature span of the transfer function plot Step control sets the step size of the plot This value is expressed in terms of LSB of the temperature sensor that is Step 1 is equivalent to 1 16th of C 0 0625 C STOP terminates the plot routine When plot is completed or when STOP is pressed a text log ...

Page 12: ...9 J10 LMP92066 LMP92066 EVM Quick Start www ti com Board Layout Figure 10 LMP92066EVM Board Layout 12 LMP92066 Dual Temperature Controlled DAC Evaluation Module SNAU153 MARCH 2014 Submit Documentation Feedback Copyright 2014 Texas Instruments Incorporated ...

Page 13: ...D VIO VIO A1 DRVEN1 DRVEN0 FETDRV1 FETDRV0 DNI C2 DNI C3 GND GND GND GND GND 1 2 3 J7 VIO GND DAC1 A1 1 2 3 J8 VIO GND A0 1 2 3 J9 VIO GND 1 2 3 J10 VIO GND DRVEN0 DRVEN1 ADDRESS SELECTORS 1 2 3 4 5 SUPPLY 1754494 VIO VDDB GND TERMINAL BLOCK 10µF C5 1µF C6 1000pF C7 VDD GND 10µF C8 1µF C9 1000pF C10 VDDB GND 10µF C11 1µF C12 1000pF C13 VIO GND 10µF C14 1µF C15 1000pF C16 VSSB GND GND GND 1 2 3 4 5...

Page 14: ...ring the warranty period to the address designated by TI and that are determined by TI not to conform to such warranty If TI elects to repair or replace such EVM TI shall have a reasonable time to repair such EVM or provide replacements Repaired EVMs shall be warranted for the remainder of the original warranty period Replaced EVMs shall be warranted for a new full ninety 90 day warranty period 3 ...

Page 15: ... by Industry Canada to operate with the antenna types listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated Antenna types not included in this list having a gain greater than the maximum gain indicated for that type are strictly prohibited for use with this device Concernant les EVMs avec antennes détachables Conformément à la rég...

Page 16: ... connecting any load to the EVM output If there is uncertainty as to the load specification please contact a TI field representative During normal operation even with the inputs and outputs kept within the specified allowable ranges some circuit components may have elevated case temperatures These components include but are not limited to linear regulators switching transistors pass transistors cu...

Page 17: ...F REMOVAL OR REINSTALLATION ANCILLARY COSTS TO THE PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES RETESTING OUTSIDE COMPUTER TIME LABOR COSTS LOSS OF GOODWILL LOSS OF PROFITS LOSS OF SAVINGS LOSS OF USE LOSS OF DATA OR BUSINESS INTERRUPTION NO CLAIM SUIT OR ACTION SHALL BE BROUGHT AGAINST TI MORE THAN ONE YEAR AFTER THE RELATED CAUSE OF ACTION HAS OCCURRED 8 2 Specific Limitations IN NO EVENT SHALL T...

Page 18: ...esponsible for compliance with all legal regulatory and safety related requirements concerning its products and any use of TI components in its applications notwithstanding any applications related information or support that may be provided by TI Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which anticipate dangerous consequences of failur...

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