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Test Setup and Results
9
SLLU298 – May 2018
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Copyright © 2018, Texas Instruments Incorporated
ISO5852SDW Driving and Protecting SiC and IGBT Power Modules
Figure 3. ISO5852SDWEVM-017 Mounted on Top of Power Module
2
Test Setup and Results
Test setup and related waveforms presented in User's Guide are for ISO5852SDWEVM-017 EVM
EXCLUDING any user provided power modules attached to backside of the EVM. Capacitive load
presented by power module is emulated by 10 nF capacitors C16 and C36. When EVM is attached to and
evaluated with power module, capacitors C16 and C36 should be removed.
2.1
Before You Begin
When starting to evaluate and test the ISO5852SDWEVM-017 EVM, it will typically be in a stand-alone
configuration, separate from power module. This EVM does not internally generate high voltages or high
temperatures.
In the start-up configuration, there will be no high voltage or high temperature capable of presenting the
user with an electrical shock hazard or burn resulting from elevated temperature risks provided the EVM is
used within its electrical load rating limits established in
Table 1
.
WARNING
To minimize risk of electric shock hazard always follow safety
practices normally followed in a development laboratory. Refer to
TI’s EVM High Voltage guideline accompanying this EVM.
However, to evaluate isolated input rail amplifier voltages in accordance with the described below test
procedure 2.2.4, which requires the addition of an external power source with maximum rating of 300
VDC, high voltage may be accessible between board test points DU and SL.