DAC1006/1007/1008 — Simple Hookup for a “Quick Look”
(Continued)
The output voltage swing can be expanded by adding 2 re-
sistors to
Figure 10 as shown in Figure 11. These added re-
sistors are used to attenuate the +V voltage. The overall
gain, A
V
(−), from the +V terminal to the output of the op amp
determines the most negative output voltage, −4(+V) (when
the V
REF
voltage at the + input of the op amp is zero) with the
component values shown. The complete dynamic range of
V
OUT
is provided by the gain from the (+) input of the op
amp. As the voltage at the V
REF
pin ranges from 0V to
+V(1023/1024) the output of the op amp will range from −10
V
DC
to +10V (1023/1024) when using a +V voltage of +2.500
V
DC
. The 2.5 V
DC
reference voltage can be easily developed
by using the LM336 zener which can be biased through the
R
FB
internal resistor, connected to V
CC
.
5.3 Op Amp V
OS
Adjust (Zero Adjust) for Current
Switching Mode
Proper operation of the ladder requires that all of the 2R legs
always go to exactly 0 V
DC
(ground). Therefore offset volt-
age, V
OS
, of the external op amp cannot be tolerated as ev-
ery millivolt of V
OS
will introduce 0.01% of added linearity er-
ror. At first this seems unusually sensitive, until it becomes
clear the 1 mV is 0.01% of the 10V reference! High resolu-
tion converters of high accuracy require attention to every
detail in an application to achieve the available performance
which is inherent in the part. To prevent this source of error,
the V
OS
of the op amp has to be initially zeroed. This is the
“zero adjust” of the DAC calibration sequence and should be
done first.
If the V
OS
is to be adjusted there are a few points to consider.
Note that no “dc balancing” resistance should be used in the
grounded positive input lead of the op amp. This resistance
and the input current of the op amp can also create errors.
The low input biasing current of the BI-FET op amps makes
them ideal for use in DAC current to voltage applications.
The V
OS
of the op amp should be adjusted with a digital input
of all zeros to force I
OUT
=0 mA. A 1 k
Ω
resistor can be tem-
porarily connected from the inverting input to ground to pro-
vide a dc gain of approximately 15 to the V
OS
of the op amp
and make the zeroing easier to sense.
5.4 Full-Scale Adjust
The full-scale adjust procedure depends on the application
circuit and whether the DAC is operated in the current
switching mode or in the voltage switching mode. Tech-
niques are given below for all of the possible application cir-
cuits.
5.4.1 Current Switching with Unipolar Output Voltage
After doing a “zero adjust,” set all of the digital input levels
HIGH and adjust the magnitude of V
REF
for
This completes the DAC calibration.
5.4.2 Current Switching with Bipolar Output Voltage
The circuit of
Figure 12 shows the 3 adjustments needed.
The first step is to set all of the digital inputs LOW (to force
I
OUT1
to 0) and then trim “zero adj.” for zero volts at the in-
verting input (pin 2) of 0A1. Next, with a code of all zeros still
applied, adjust “−FS adj.”, the reference voltage, for
V
OUT
=
±
|(ideal V
REF
)|. The sign of the output voltage will be
opposite that of the applied reference.
Finally, set all of the digital inputs HIGH and adjust “+FS adj.”
for V
OUT
=V
REF
(511/512). The sign of the output at this time
will be the same as that of the reference voltage. The addi-
tion of the 200
Ω
resistor in series with the V
REF
pin of the
DAC is to force the circuit gain error from the DAC to be
negative. This insures that adding resistance to R
fb
, with the
500
Ω
pot, will always compensate the gain error of the DAC.
5.4.3 Voltage Switching with a Unipolar Output Voltage
Refer to the circuit of
Figure 13 and set all digital inputs
LOW. Trim the “zero adj.” for V
OUT
=0 V
DC
±
1 mV. Then set
all digital inputs HIGH and trim the “FS Adj.” for:
5.4.4 Voltage Switching with a Bipolar Output Voltage
Refer to
Figure 14 and set all digital inputs LOW. Trim the
“−FS Adj.” for V
OUT
=−2.5 V
DC
. Then set all digital inputs
HIGH and trim the “+FS Adj.” for V
OUT
=+2.5 (511/512) V
DC
.
Test the zero by setting the MS digital input HIGH and all the
rest LOW. Adjust V
OS
of amp #3, if necessary, and recheck
the full-scale values.
DS005688-48
FIGURE 11. Increasing the Output Voltage Swing
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PrintDate=1998/11/17 PrintTime=11:38:09 46711 ds005688 Rev. No. 4
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