DAC1006/1007/1008 — Simple
Hookup for a “Quick Look”
(Continued)
6.2.1 Automatic Transfer
This makes use of a double byte (double precision) write.
The first byte (8 bits) is strobed into the input latch and the
second byte causes a simultaneous strobe of the two re-
maining bits into the input latch and also the transfer of the
complete 10-bit word from the input latch to the DAC regis-
ter. This is shown in the following timing diagram; the point in
time where the analog output is updated is also indicated on
this diagram.
6.2.2 Transfer Using µP Write Stroke
The input latch is loaded with the first two write strobes. The
XFER signal is provided by external logic, as shown below,
to cause the transfer to be accomplished on a third write
strobe. This is shown in the following diagram:
6.2.3 Transfer Using an External Strobe
This is similar to the previous operation except the XFER
signal is not provided by the µP. The timing diagram for this
is:
6.3 Interfacing to a 16-Bit Data Bus
The interface to a 16-bit data bus is easily handled by con-
necting to 10 of the available bus lines. This allows a wiring
selected right justified or left justified data format. This is
shown in the connection diagram of
Figure 17, where the
use of DB6 to DB15 gives left justified data operation. Note
that any part number can be used and the Byte1/Byte2 con-
trol should be wired Hi.
DAC1006/1007/1008 (20-Pin Parts)
DS005688-18
*
SIGNIFIES CONTROL INPUTS WHICH ARE DRIVEN IN PARALLEL
DAC1006/1007/1008 (20–Pin Parts)
DS005688-19
DAC1006/1007/1008 (20–Pin Parts)
DS005688-20
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17
PrintDate=1998/11/17 PrintTime=11:38:10 46711 ds005688 Rev. No. 4
cmserv
Proof
17
