2.0
1.8
8
0
12
20
System Frequency - MHz
Supply Voltage - V
The numbers within the fields denote the supported PMMCOREVx settings.
2.2
2.4
3.6
0, 1, 2, 3
0, 1, 2
0, 1
0
1, 2, 3
1, 2
1
2, 3
3
2
16
ECCN 5E002 TSPA - Technology / Software Publicly Available
CC430F6137, CC430F6135, CC430F6127, CC430F6126, CC430F6125
CC430F5137, CC430F5135, CC430F5133
www.ti.com
SLAS554H – MAY 2009 – REVISED SEPTEMBER 2013
Recommended Operating Conditions (continued)
Typical values are specified at V
CC
= 3.3 V and T
A
= 25°C (unless otherwise noted)
MIN
NOM
MAX
UNIT
PMMCOREVx = 0
0
8
(default condition)
PMMCOREVx = 1
0
12
f
SYSTEM
Processor (MCLK) frequency
(6)
(see
Figure 2
)
MHz
PMMCOREVx = 2
0
16
PMMCOREVx = 3
0
20
P
INT
Internal power dissipation
V
CC
× I
(DVCC)
W
(V
CC
- V
IOH
) × I
IOH
+
P
IO
I/O power dissipation of I/O pins powered by DVCC
W
V
IOL
× I
IOL
P
MAX
Maximum allowed power dissipation, P
MAX
> P
IO
+ P
INT
(T
J
- T
A
) /
θ
JA
W
(6)
Modules may have a different maximum input clock specification. See the specification of the respective module in this data sheet.
Figure 2. Maximum System Frequency
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