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CC2500
SWRS040C
Page 58 of 89
Address
Register
Description
Preserved in
SLEEP State
Details on
Page Number
0x00
GDO2
output pin configuration
Yes
0x01
GDO1
output pin configuration
Yes
0x02
GDO0
output pin configuration
Yes
61
0x03
RX FIFO and TX FIFO thresholds
Yes
0x04
Sync word, high byte
Yes
0x05
Sync word, low byte
Yes
0x06
Packet length
Yes
62
0x07
Packet automation control
Yes
0x08
Packet automation control
Yes
0x09
Device address
Yes
0x0A
Channel number
Yes
64
0x0B
Frequency synthesizer control
Yes
0x0C
Frequency synthesizer control
Yes
0x0D
Frequency control word, high byte
Yes
0x0E
Frequency control word, middle byte
Yes
0x0F
Frequency control word, low byte
Yes
65
0x10
Modem configuration
Yes
0x11
Modem configuration
Yes
66
0x12
Modem configuration
Yes
0x13
Modem configuration
Yes
0x14
Modem configuration
Yes
68
0x15
Modem deviation setting
Yes
0x16
Main Radio Control State Machine configuration
Yes
0x17
Main Radio Control State Machine configuration
Yes
0x18
Main Radio Control State Machine configuration
Yes
0x19
Frequency Offset Compensation configuration
Yes
0x1A
Bit Synchronization configuration
Yes
0x1B
AGC control
Yes
0x1C
AGC control
Yes
0x1D
AGC control
Yes
0x1E
High byte Event 0 timeout
Yes
77
0x1F
Low byte Event 0 timeout
Yes
0x20
Wake On Radio control
Yes
0x21
Front end RX configuration
Yes
78
0x22
Front end TX configuration
Yes
0x23
Frequency synthesizer calibration
Yes
0x24
Frequency synthesizer calibration
Yes
79
0x25
Frequency synthesizer calibration
Yes
0x26
Frequency synthesizer calibration
Yes
0x27
RC oscillator configuration
Yes
0x28
RC oscillator configuration
Yes
0x29
Frequency synthesizer calibration control
No
0x2A
Production test
No
80
0x2B
AGC test
No
0x2C
Various test settings
No
0x2D
Various test settings
No
0x2E
Various test settings
No
Table 35: Configuration Registers Overview
Summary of Contents for CC2500
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