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CC2500
SWRS040C
Page 64 of 89
0x08: PKTCTRL0 – Packet Automation Control
Bit
Field Name
Reset
R/W
Description
7
Reserved
R0
6
WHITE_DATA
1
R/W
Turn data whitening on / off
0: Whitening off
1: Whitening on
Data whitening can only be used when
PKTCTRL0.CC2400_EN=0 (default).
5:4
PKT_FORMAT[1:0]
0 (00)
R/W
Format of RX and TX data
Setting
Packet format
0 (00)
Normal mode, use FIFOs for RX and TX
1 (01)
Synchronous serial mode, used for backwards
compatibility. Data in on GDO0
2 (10)
Random TX mode; sends random data using PN9
generator. Used for test.
Works as normal mode, setting 0 (00), in RX.
3 (11)
Asynchronous serial mode. Data in on GDO0 and
data out on either of the GDO0 pins
3
CC2400_EN
0
R/W
Enable CC2400 support. Use same CRC implementation as
CC2400.
PKTCTRL1.CRC_AUTOFLUSH must be 0 if
PKTCTRL0.CC2400_EN=1.
PKTCTRL0.WHITE_DATA must be 0 if
PKTCTRL0.CC2400_EN=1.
2
CRC_EN
1
R/W
1: CRC calculation in TX and CRC check in RX enabled
0: CRC disabled for TX and RX
1:0
LENGTH_CONFIG[1:0]
1 (01)
R/W
Configure the packet length
Setting
Packet length configuration
0 (00)
Fixed packet length mode. Length configured in
PKTLEN register
1 (01)
Variable packet length mode. Packet length
configured by the first byte after sync word
2 (10)
Infinite packet length mode
3 (11)
Reserved
0x09: ADDR – Device Address
Bit
Field Name
Reset
R/W
Description
7:0
DEVICE_ADDR[7:0]
0 (0x00)
R/W
Address used for packet filtration. Optional broadcast
addresses are 0 (0x00) and 255 (0xFF).
0x0A: CHANNR – Channel Number
Bit
Field Name
Reset
R/W
Description
7:0
CHAN[7:0]
0 (0x00)
R/W
The 8-bit unsigned channel number, which is multiplied by the
channel spacing setting and added to the base frequency.
Summary of Contents for CC2500
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