SYSCFG Registers
Table 10-25. Pin Multiplexing Control 4 Register (PINMUX4) Field Descriptions (continued)
Bit
Field
Value
Description
Type
(1)
15-12
PINMUX4_15_12
SPI1_SCS[6]/I2C0_SDA/TM64P3_OUT12/GP1[4] Control
0
Pin is 3-stated.
Z
1h
Selects Function SPI1_SCS[6]
I/O
2h
Selects Function I2C0_SDA
I/O
3h
Reserved
X
4h
Selects Function TM64P3_OUT12
O
5h-7h
Reserved
X
8h
Selects Function GP1[4]
I/O
9h-Fh
Reserved
X
11-8
PINMUX4_11_8
SPI1_SCS[7]/I2C0_SCL/TM64P2_OUT12/GP1[5] Control
0
Pin is 3-stated.
Z
1h
Selects Function SPI1_SCS[7]
I/O
2h
Selects Function I2C0_SCL
I/O
3h
Reserved
X
4h
Selects Function TM64P2_OUT12
O
5h-7h
Reserved
X
8h
Selects Function GP1[5]
I/O
9h-Fh
Reserved
X
7-4
PINMUX4_7_4
SPI0_SCS[0]/TM64P1_OUT12/GP1[6]/MDIO_D/TM64P1_IN12 Control
0
Selects Function TM64P1_IN12
I
1h
Selects Function SPI0_SCS[0]
I/O
2h
Selects Function TM64P1_OUT12
O
3h
Reserved
X
4h
Selects Function GP1[6]
I/O
5h-7h
Reserved
X
8h
Selects Function MDIO_D
I/O
9h-Fh
Reserved
X
3-0
PINMUX4_3_0
SPI0_SCS[1]/TM64P0_OUT12/GP1[7]/MDIO_CLK/TM64P0_IN12 Control
0
Selects Function TM64P0_IN12
I
1h
Selects Function SPI0_SCS[1]
I/O
2h
Selects Function TM64P0_OUT12
O
3h
Reserved
X
4h
Selects Function GP1[7]
I/O
5h-7h
Reserved
X
8h
Selects Function MDIO_CLK
O
9h-Fh
Reserved
X
171
SPRUGX5A
–
May 2011
System Configuration (SYSCFG) Module
Copyright
©
2011, Texas Instruments Incorporated