SYSCFG Registers
Table 10-26. Pin Multiplexing Control 5 Register (PINMUX5) Field Descriptions (continued)
Bit
Field
Value
Description
Type
(1)
11-8
PINMUX5_11_8
SPI1_CLK/GP2[13] Control
0
Pin is 3-stated.
Z
1h
Selects Function SPI1_CLK
I/O
2h-7h
Reserved
X
8h
Selects Function GP2[13]
I/O
9h-Fh
Reserved
X
7-4
PINMUX5_7_4
SPI1_SCS[0]/GP2[14]/TM64P3_IN12 Control
0
Selects Function TM64P3_IN12
I
1h
Selects Function SPI1_SCS[0]
I/O
2h-7h
Reserved
X
8h
Selects Function GP2[14]
I/O
9h-Fh
Reserved
X
3-0
PINMUX5_3_0
SPI1_SCS[1]/GP2[15]/TM64P2_IN12 Control
0
Selects Function TM64P2_IN12
I
1h
Selects Function SPI1_SCS[1]
I/O
2h-7h
Reserved
X
8h
Selects Function GP2[15]
I/O
9h-Fh
Reserved
X
173
SPRUGX5A
–
May 2011
System Configuration (SYSCFG) Module
Copyright
©
2011, Texas Instruments Incorporated