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Summary of Contents for AFE722 Series

Page 1: ...ock generation using a low jitter PLL in combination with a VCXO On the transmit side the EVM provides the option of connecting directly to the DAC outputs or perform up conversion via on board IQ modulator On the digital side the EVM provides a seamless interface to the TSW1200 capture card in order to evaluate received data directly on a PC The TSW3100 pattern generation card can be used to prov...

Page 2: ...f Tables 1 Control Registers 6 2 Clock Delays for Listed DAC Sampling Rates 7 3 IP Address Digit Selection Using SW2 17 1 Software Installation 1 Open folder named AFE722x_Installer_vxpx xpx represents the latest version 2 Run Setup exe 3 Follow the on screen instructions 4 Once installed launch by clicking on the AFE722x_GUI_vxpx program in Start Texas Instruments ADCs 5 When plugging in the USB ...

Page 3: ...into the following directory in order for the TSW1200 to recognize it C Program Files Texas Instruments TSW1200 ADC Files 3 AFE722x EVM Software SPI Control The AFE722x EVM software controls the AFE722x and CDCE72010 on the EVM via SPI register writes through a USB connection with the PC Below is a snapshot of the GUI front panel highlighting the various tabs to control the setup of AFE722x as wel...

Page 4: ...t cable All appropriate power supplies should be connected blue LED D2 on AFE722x EVM indicating power good status After performing USB reset in AFE722x EVM software the flashing USB warning sign should disappear indicating successful USB communication 4 1 CDCE72010 Configuration The initial EVM setup is configured so that the AFE722x can be operated at any desired sampling rate Since the TSW3100 ...

Page 5: ...e USB communication warning sign should be monitored after the USB reset to ensure proper communication with the AFE722x EVM Register Bit Setting Interface Serial LVDS Master Override Enabled Format Offset Binary Serial LVDS 2 Wire Data Orientation MSB First SDR Mode Disabled Wordwise Output Disabled Bitwise RX Disabled Halfrx in 2wire Disabled In the TSW1200 software the AFE722x should be selecte...

Page 6: ...e AFE722x EVM Table 1 Control Registers Register Bit Setting Interface Serial LVDS Master Override Enabled Serial LVDS 2 Wire Data Orientation MSB first Format 2s Complement Clock Delay Enabled Clock Delay 300ps Frame Clock Delay Disabled Frame Clock Delay 0ps The data coming from the TSW3100 is edge aligned while the AFE722x expects the serial LVDS data to arrive edge centered Here the programmab...

Page 7: ... to 900ps 122 88Msps 0ps to 900ps 100Msps 0ps to 1 2ns 80Msps 0ps to 1 8ns 65Msps 0ps to 2 1ns 40Msps 0ps to 2 1ns For TX the output data of the TSW3100 needs to be properly configured for 6x serialization using Matlab 1 Install Matlab runtime engine MCRInstaller exe 2 Open one of the executable exe TSW3100 GUIs TSW3100_MultitonePattern_v2p7 exe 3 Enter DAC sampling rate 4 Enter tone frequencies 7...

Page 8: ... format with AFE722x setup e g 2s complement Select Load and Run option Initial EVM Setup and Basic Test Procedure www ti com The DAC output should show something like this on the spectrum analyzer example with sample rate 122 88 MSPS input tone 10 MHz 8 EVM Description SLOU330 December 2011 Submit Documentation Feedback Copyright 2011 Texas Instruments Incorporated ...

Page 9: ...provides options to disable unused circuits by means of pin headers These headers can also be used for accurate power measurements where external power supplies can be directly connected to them Three pin headers allow a convenient change between powering the AFE722x and CDCE72010 either from DC DC converter or low noise LDO 6 Clocking Configuration The AFE722x EVM offers 3 different options for p...

Page 10: ...by 2x or 4x Preconfigured setup files AUX IN INT2x div3 AFE div8 TSW txt ext 3x clock to CDC AUX IN see 6 5 AUX IN div3 AFE div4 TSW txt ext 3x clock to CDC AUX IN see 6 1 REF IN 10MHz div6 AFE div8 TSW txt ext 10MHz clock on REF IN see 6 2 REF IN 10MHz INT2x div6 AFE div16 TSW txt ext 10MHz clock on REF IN see 6 2 6 5 REF IN 122 88MHz div6 AFE div8 TSW txt ext 122 88MHz clock on REF IN see 6 2 6 ...

Page 11: ...76 and R112 need to be modified from their default configuration The DACs of the AFE can still be operated however the TSW3100 can t be used for data generation as no feedback clock is provided to it This option provides the lowest possible jitter option when combined with an external bandpass filter 6 4 RX and TX Independent Clocking The AFE722x supports an option to run the dual ADCs at a differ...

Page 12: ... is controlled on two separate tabs of the EVM software In the General Setup tab are the control registers for the digital interface such as CMOS or serial LVDS output for example In order to use the TSW1200 to capture the received data the following register settings are required Register Bit Setting Interface Serial LVDS Master Override Enabled Format Offset Binary Serial LVDS 2 Wire Data Orient...

Page 13: ...liary ADC registers are configured on this tab 8 TX Setup For the transmit output the AFE722x EVM provides an option to directly route the DACs to SMA connectors as well as an option to connect the dual DAC to an IQ modulator TRF3703 for direct up conversion The schematic below shows the two options and the relevant 0Ω resistors to switch between them When using the IQ modulator there is a separat...

Page 14: ...ol registers need to be set in the General Setup tab of the AFE722x programming software Also the USB communication warning sign should be monitored after the USB reset to ensure proper communication with the AFE722x EVM Register Bit Setting Interface Serial LVDS Master Override Enabled Serial LVDS 2 Wire Data Orientation MSB First Format 2s Complement Clock Delay Enabled Clock Delay 300ps Frame C...

Page 15: ...0ps to 2 1ns The other portion of the TX setup is located on the Transmit Control tab which includes register access for the mixing stage FIFO Loopback and power options for the digital TX section Also the auxiliary DAC registers are configured on this tab 9 Trouble Shooting of the EVM Setup The two main problems engineers face are covered in this chapter Often times a programming step is missed l...

Page 16: ...port is connected to the TSW3100 3 set the address of the Ethernet port to be the following 192 168 1 120 Step 2 TSW3100 Configuration 1 Ensure that the SW2 dip switches are all set to open open side down This will set the TSW3100 to be IP address 192 168 1 123 16 EVM Description SLOU330 December 2011 Submit Documentation Feedback Copyright 2011 Texas Instruments Incorporated ...

Page 17: ...22 Open Open 192 168 1 123 2 To confirm ping both 192 168 1 123 and 192 168 1 120 Open a command prompt and type in Ping 192 168 1 120 Ping 192 168 1 123 and watch for 0 packet loss 3 If both address response then TSW3100 works TSW3100 version check telnet 192 168 1 123 cd etc more version 17 SLOU330 December 2011 EVM Description Submit Documentation Feedback Copyright 2011 Texas Instruments Incor...

Page 18: ...for use in safety critical applications such as life support where a failure of the TI product would reasonably be expected to cause severe personal injury or death unless officers of the parties have executed an agreement specifically governing such use Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications and acknowledge and agre...

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