DAC A
SMA
Connector
R46 0
S
DAC B
R133
DNI
TRF3703
LO
RF Out
Fc=125 MHz
R56 0
S
R127
DNI
SMA
Connector
SMA
Connector
SMA
Connector
R114
DNI
R120
DNI
R58 0
S
R68 0
S
TX Setup
When using the TSW3100 as a pattern generator for the AFE722x,
first the digital interface needs to be configured to match the serial
LVDS interface from the TSW3100.
Following control registers need to be set in the
‘
General Setup
’
tab
of the AFE722x programming software.
Also the USB communication warning sign should be monitored after
the USB reset to ensure proper communication with the AFE722x
EVM.
Register Bit
Setting
Interface
Serial LVDS
Master Override
Enabled
Serial LVDS
2 Wire
Data Orientation
MSB First
Format
2s Complement
Clock Delay
Enabled
Clock Delay
300ps
Frame Clock Delay
Disabled
Frame Clock Delay
Disabled
14
EVM Description
SLOU330
–
December 2011
Copyright
©
2011, Texas Instruments Incorporated