TPMC671 User Manual Issue 1.1
Page 17 of 28
4.2.8 Debounce Time Register
The Debounce Time Register is a word wide read/write register.
Bit
Symbol
Description
Access
Reset
Value
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
DB_TIME
The debounce time could be programmed by writing a
hexadecimal value in the register.
One hexadecimal step corresponds to a debounce
time of about 7µs.
min debounce time: 7µs
max debounce time: 440ms
debounce step: ca. 7µs
The value 0 in this register sets the debounce time to
a minimum of 7µs. This is the default state after
power-on or reset. Any debounce time in the range of
7µs to 440ms can be programmed in steps of ca. 7µs.
The debounce time is common for all 16 inputs.
R/W
0x0000
Figure 4-10: Debounce Time Register
To use the programmable debounce time, the Debounce Enable Bit of the Control / Status
Register must be set to ‘1’.
If the Debounce Enable Bit of the Control / Status Register is set to ‘0’, no debounce function is
active for all inputs.
The following formulas can be used to determine the preload value.
(
)
5
.
3
64
1
⋅
⋅
+
=
PCICLK
Z
t
db
1
5
.
3
64
−
⋅
⋅
=
PCICLK
t
Z
db
(
)
4
64
1
max
⋅
⋅
+
=
PCICLK
Z
t
(
)
3
64
1
min
⋅
⋅
+
=
PCICLK
Z
t
Figure 4-11: Formulas to determine preload value
t
db
- typical debounce time [ s ]
Z
- preload value
PCICLK - 33.33 MHz
t
max
- max. debounce time [ s ]
t
min
- min. debounce time [ s ]
