TPMC671 User Manual Issue 1.1
Page 15 of 28
4.2.6 Rising Edge Interrupt Status Register
The Rising Edge Interrupt Status Register is a word wide read/write register.
Bit
Symbol
Description
Access
Reset
Value
15 INT_STA_H16
14 INT_STA_H15
13 INT_STA_H14
12 INT_STA_H13
11 INT_STA_H12
10 INT_STA_H11
9 INT_STA_H10
8 INT_STA_H9
7 INT_STA_H8
6 INT_STA_H7
5 INT_STA_H6
4 INT_STA_H5
3 INT_STA_H4
2 INT_STA_H3
1 INT_STA_H2
0 INT_STA_H1
Read access:
0 = no interrupt request pending
1 = interrupt request pending
Write access:
0 = no effect
1 = clear pending interrupt request
Bit 0 of this register reflects the interrupt request state
of input line 1 for the rising edge, bit 15 reflects the
interrupt request state of input line 16 for the rising
edge.
An interrupt request for a specific input line is cleared
by writing ‘1’ to the according bit of the Rising Edge
Interrupt Status Register.
R/W
0x0000
Figure 4-8 : Rising Edge Interrupt Status Register
