Tern V104, Technical Manual

Page: 43 / 55

V104 Appendix D: RTC72421 / 72423
D-1
Appendix D: RTC72421 / 72423
Function Table
Address Data
A
3
A
2
A
1
A
0
Register D
3
D
2
D
1
D
0
Count
Value Remarks
0 0 0 0 S
1
s
8
s
4
s
2
s
1
0~9 1-second digit register
0 0 0 1 S
10
s
40
s
20
s
10
0~5 10-second digit register
0 0 1 0 MI
1
mi
8
mi
4
mi
2
mi
1
0~9 1-minute digit register
0 0 1 1 MI
10
mi
40
mi
20
mi
10
0~5 10-minute digit register
0 1 0 0 H
1
h
8
h
4
h
2
h
1
0~9 1-hour digit register
0 1 0 1 H
10
PM/AM h
20
h
10
0~2
or
0~1 PM/AM, 10-hour digit
register
0 1 1 0 D
1
d
8
d
4
d
2
d
1
0~9 1-day digit register
0 1 1 1 D
10
d
20
d
10
0~3 10-day digit register
1 0 0 0 MO
1
mo
8
mo
4
mo
2
mo
1
0~9 1-month digit register
1 0 0 1 MO
10
mo
10
0~1 10-month digit register
1 0 1 0 Y
1
y
8
y
4
y
2
y
1
0~9 1-year digit register
1 0 1 1 Y
10
y
80
y
40
y
20
y
10
0~9 10-year digit register
1 1 0 0 W w
4
w
2
w
1
0~6 Week register
1 1 0 1 Reg D 30s
Adj IRQ
Flag Busy Hold Control register D
1 1 1 0 Reg E t
1
t
0
INT/
STD Mask Control register E
1 1 1 1 Reg F Test 24/ 12 Stop Rest Control register F
Note: 1) INT/STD = Interrupt/Standard, Rest = Reset;
2) Mask AM/PM bit with 10's of hours operations;
3) Busy is read only, IRQ can only be set low ("0");
4)
Data bit PM/AM
INT/STD 24/12
1 PM INT 24
0 AM STD 12
5) Test bit should be "0".