TSoM Evaluation
Kit User Manual
17
www.terasic.com
July 26, 2019
Figure 3-14 Program .sof file into the FPGA device
Configure the FPGA in AS Mode
The TSoM evaluation kit board uses a serial configuration device (EPCS64) to store configuration
data for the Cyclone V SoC FPGA. This configuration data is automatically loaded from the serial
configuration device chip into the FPGA when the board is powered up.
Users need to use Serial Flash Loader (SFL) to program the serial configuration device via JTAG
interface. The FPGA-based SFL is a soft intellectual property (IP) core within the FPGA that bridge
the JTAG and Flash interfaces. The SFL Megafunction is available in Quartus II.
Figure 3-15
shows the programming method when adopting SFL solution.
Figure 3-15 Programming a serial configuration device with SFL solution
Summary of Contents for TSOM
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