Tektronix 2213, Instruction Manual

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Theory of Operation—2213 Service
w ith the exception o f an additional pair o f transistors
that performs the inverting function. In the Normal mode
o f operation, Q257 and Q267 are biased on and Q258 and
Q268 biased o ff by INVERT switch S264 grounding one
end o f R263. In the Invert mode (IN VER T switch pressed
in), cross-wired transistors Q258 and Q268 are biased on
and Q257 and Q267 biased o ff by grounding the junction
o f R256 and R266. Invert Bal potentiometer R264 is
adjusted to correct fo r dc offsets between the two
switching-transistor pairs. When R264 is correctly adjusted,
a baseline trace w ill maintain the same vertical position as
the amplifier is switched between Invert and Normal.
Internal Trigger Pickoff Amplifier
The Internal Trigger Pickoff Am plifier supplies trigger
signals to the Internal Trigger A m plifier in the Trigger
circuitry (Diagram 4). Internal trigger signals are provided
by the vertical preamplifiers and are applied to the bases
o f U170B and U170C (for Channel 1) and U270B and
U270C (for Channel 2). These transistor pairs are biased
on, either individually or together, from the Internal
Trigger Switching Logic circuit (Diagram 3).
When Channel 1 is the selected internal trigger source,
Q173 and U170A (CH 1) w ill be biased on and Q273
(CH 2) biased off. Current flowing through R173, R183,
and R197 w ill bias on U197A to keep U197E cut off.
Em itter current is supplied to U170A by U197D. In turn,
U170A then supplies emitter current to U170B and U170C
to enable the Channel 1 internal trigger signals to pass to
the Internal Trigger Am plifier.
When Channel 2 is selected as the internal trigger source,
Q273 and U270A w ill be biased on and Q173 biased off.
Transistor U197A w ill remain on, and current supplied by
U197D w ill supply em itter current to U270A. Then U270A
in turn supplies the emitter current to U270B and U270C
and enables the Channel 2 internal trigger signals to pass to
the Internal Trigger Am plifier.
When the TRIGGER INT switch is set to VERT MODE,
the actual signal source selected depends on the setting of
the VER TICAL MODE switches. If either CH 1 or CH 2
VE R TIC A L MODE is selected, the preceding discussion on
Channel 1 or Channel 2 internal trigger signals applies.
When the VE R TIC A L MODE switch is set to BOTH, the
VE R TIC A L MODE ADD-ALT-CHOP switch setting deter­
mines the switching action fo r selecting the internal trigger
source.
Selecting ADD VER TIC AL MODE causes both internal
trigger-select signals (CH 1 Trig and CH 2 Trig) to be LO,
and both Q173 and Q273 are biased off. Transistor U197A
then becomes biased o ff causing U197E to saturate. With
U197E saturated, em itter current is supplied to both
Channel 1 and Channel 2 Trigger Pickoff Am plifiers
(U170C and U170B fo r Channel 1 and U270B and U270C
fo r Channel 2) via R196-CR196 and R296-CR296 respec­
tively. When both p icko ff amplifiers are enabled, the
resulting trigger signal is the sum o f the Channel 1 and
Channel 2 internal trigger signals. The sum o f the current
supplied by U197E to both p ic k o ff amplifiers is the same
magnitude as the current from U197D when either CH 1
or CH 2 is selected individually. Therefore, the dc output
to the Internal Trigger A m plifier w ill be the same fo r CH 1,
CH 2, and ADD VER TICAL MODE trigger signals.
When A L T VE R TIC A L MODE is selected w ith the
previously established settings (VER TIC AL MODE to
BOTH, INT to VERT MODE, and SOURCE to INT), the
internal trigger-select signals alternate between channels. On
one sweep the Channel 1 internal trigger w ill be selected as
previously described. On the alternate sweep, Channel 2
internal trigger w ill be selected, again as previously
described.
Under the same switch-setting conditions, selecting
CHOP VER TIC AL MODE produces the same trigger-
selection conditions as described for ADD VE R TIC A L
MODE. The sum o f the Channel 1 and Channel 2 internal
trigger signals w ill be passed to the Internal Trigger
Am plifier. See the "Internal Trigger Switching Logic"
discussion fo r a description o f how the internal trigger
selection signals are generated.
CHANNEL SWITCH
AND VERTICAL OUTPUT
The Channel Switch circuitry, shown on Diagram 3,
selects the input signal or combination o f input signals to
be connected to the Vertical O utput Am plifier. By setting
the logic input into the Channel Switching Logic circuit,
VER TIC AL MODE switches S315 and S317 select the
input signal combinations to be displayed. The internal
trigger-select signals are also generated in the Channel
Switch circuitry.
Diode Gates
The Diode Gates, consisting o f eight diodes, act as
switches that are controlled by the Channel Switching
Logic circuitry. The Q- and Q-outputs o f U317A (pins 5
and 6 respectively) control forward biasing o f the diodes
to turn the gates on and off.
CHANNEL 1 DISPLAY ONLY. To display only the
Channel 1 signal, the CH 1 Enable signal (U317A pin 5)
is HI and the CH 2 Enable signal (U317A pin 6) is LO.
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