Installing Peripherals 9-10
The following table shows the pinout for this connector when it is in EPP mode:
TABLE 9-5:
Parallel Port Connector (J15) - EPP Mode - Pinout
Pin Number
Pin Number
Signal Flow
Signal Flow
Signal
Signal
WRITE*
O
1
2
I/O
D0
D1
I/O
3
4
I/O
D2
D3
I/O
5
6
I/O
D4
D5
I/O
7
8
I/O
D6
D7
I/O
9
10
I
INTR
WAIT*
I
11
12
I
Not Used
Not Used
I
13
14
O
DATASTB
Not Used
I
15
16
O
Not Used
ADDRSTRB*
O
17
18
-
GND
GND
-
19
20
-
GND
GND
-
21
22
-
GND
GND
-
23
24
-
GND
GND
-
25
* Active low signal
Summary of Contents for TEK-AT4LVG
Page 11: ...PART ONE PRESENTATION OF THE TEK AT4LVG 1 THE MANUAL 2 PRODUCT SPECIFICATIONS...
Page 34: ...Setting Jumpers 4 5 TABLE 4 1a Jumper Settings W1 W2 W27 W28 W32 W34 W36...
Page 35: ...Setting Jumpers 4 6 TABLE 4 1b Jumper Settings W3 W15 TABLE 4 1c Jumper Settings W16 W19 W23...
Page 36: ...Setting Jumpers 4 7 TABLE 4 1d Jumper Settings W20 W22 W24 W25...
Page 37: ...Setting Jumpers 4 8 TABLE 4 1e Jumper Settings W29 W31 W39 W40 J13...
Page 38: ...Setting Jumpers 4 9 4 03 JUMPER LOCATIONS WITH DEFAULT SETTINGS...
Page 40: ...Setting Jumpers 4 11 DIAGRAM 4 1 Jumper Locations With Default Settings...
Page 67: ...Installing and Working With System Components 7 3 DIAGRAM 7 1 System Components Location...
Page 165: ...VT100 Mode 15 5 DIAGRAM 15 1 VT100 Full Setup DIAGRAM 15 2 VT100 Partial Setup...
Page 174: ...Appendices 18 7 18 02 ASSEMBLY DIAGRAM DIAGRAM 18 2 TEK AT4LVG Assembly...
Page 175: ...Appendices 18 9 18 03 CONFIGURATION DIAGRAM DIAGRAM 18 3 TEK AT4LVG Configuration...
Page 177: ...Appendices 18 13 18 05 BLOCK DIAGRAM DIAGRAM 18 5 TEK AT4LVG Block Diagram...
Page 190: ...Appendices 18 27 DIAGRAM 18 6 Connector Locations...
