Supero SuperO X9DRH-7F, User Manual

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X9DRH-7F/-iF/-iF-NV/-7TF/-iTF Motherboard User’s Manual
JS3
SAS4-7
JPWR1
JPWR2
JTPM1
T-SGPIO1
T-SGPIO2
FANB
FANA
FAN1
FAN6
JF1
JOH1
JWD
JPB1
JPG1 JPLAN1
JBT1
BT1
J21
JD1
JIPMB1
SP1
LE1
LEDS2
DM1
VGA
JSD1
LAN1
JSTBY1
S-SA
TA2
S-SA
TA3
S-SA
TA1
I-SA
TA1
I-SA
TA0
S-SA
TA0
P2 DIMM3A P2 DIMM3B P2 DIMM4A P2 DIMM4B
P1 DIMMA1
P1 DIMMA2 P1 DIMMB1 P1 DIMMB2
P1 DIMMD2
P1 DIMMD1 P1 DIMMC2 P1 DIMMC1
CPU1 SLOT1 PCI-E 3.0 x8 CPU2 SLOT4 PCI-E 3.0 x16
CPU2 SLOT6 PCI-E 3.0 x8
P2 DIMME1 P2 DIMME2 P2 DIMMF1
P2 DIMMF2
USB2/3
CPU2 SLOT7 PCI-E 3.0 x8
COM2
IPMI_LAN
FAN2
LAN2
COM1
USB0/1
P2-DIMMH2 P2-DIMMH1
P2-DIMMG2 P2-DIMMG1
Battery
JPIC21
BIOS
BMC CTRL
LAN CTRL
Intel IO Hub
LSI SAS
CTRL
SAS0-3
J22
X9DRH-7F/iF/iF-NV/7TF/iTF
Rev. 1.02
CLOSE 1st
OPEN 1st
CLOSE 1st
OPEN 1st
CPU2
CPU1
CPU1 SLOT3 PCI-E 3.0 x8
KB/MS
FAN5
CPU2 SLOT5 PCI-E 3.0 x8 CPU1 SLOT2 PCI-E 3.0 x8
JI2C1 JI2C2
I-SA
TA4
I-SA
TA5
I-SA
TA2
I-SA
TA3
JL1
FP CTRL
JPS1
LEDS1
FAN4
FAN3
USB4/5
USB6
USB8/9
T-SGPIO-S
JPME2
JPME1
A B
C
A. T-SGPIO1
B. T-SGPIO2
C. T-SGPIO-S
D. SATA DOM PWR
T-SGPIO1/2/T-SGPIO-S Headers
Two SGPIO (Serial Link General
Purpose Input/Output) headers are
located at T-SGPIO1/2 on the moth-
erboard to support I-SATA 0~5 ports.
Additionally, T-SGPIO-S supports S-
SATA 0~3 ports. These headers sup-
port Serial Link interface for onboard
SATA connections. See the table on
the right for pin definitions.
Note: NC= No Connection
T-SGPIO
Pin Definitions
Pin# Definition Pin Definition
1 NC 2 NC
3 Ground 4 Data
5 Load 6 Ground
7 Clock 8 NC
SATA DOM Power Connector
A power connector for SATA DOM
(Disk_On_Module) devices is located
at JSD1. Connect an appropriate
cable here to provide power support
for your SATA DOM devices.
DOM PWR
Pin Definitions
Pin# Definition
1 +5V
2 Ground
3 Ground
D