14
A+ Server AS -1114S-WTRT User's Manual
Figure 1-5. System Block Diagram
Note:
This is a general block diagram and may not exactly represent the features on your
motherboard. See the System Specifications appendix for the actual specifications of your
motherboard.
J5
J6
J7
J8
J1
J2
J3
J4
H12SSW AMD SP3 Rome Rev. 1.00
SXB2
CPU
E
DD
R4
D
IM
M
A
DD
R4
D
IM
M
DD
R4
D
IM
M
DD
R4
D
IM
M
DD
R4
D
IM
M
DD
R4
D
IM
M
DD
R4
D
IM
M
USB3.0
Type A
DD
R4
D
IM
M
F
G
H
B
C
D
G2[3:0] / SATA[23:20]
G3[3:0] / SATA[33:30]
G3[7:4] / SATA[37:34]
P0 [1:0]
M.2 Conn
M key
BCM57416
(co-lay BCM5720L)
P0 [15:8]
EPYC Rome Processor
USB_1_SS_2TX / USB_1_HSD2
USB 3.0
front panel
P2 [15:0]
P3[15:0]
SXB1
10Gb LAN
RJ45
10Gb LAN
RJ45
COM1
MLAN
LAN1
USB3.0 X 2
ID SW
Rear I/O
+
VGA
USB3.0 X 2
LAN2
ID LED
Slim SAS
x8
G2[7:4] / SATA[27:24]
G1[3:0]
G1[7:4]
USB_0_SS_0TX / USB_0_HSD0
USB_1_SS_3TX / USB_1_HSD3
JSLIM2
JSLIM1
RX 0-7
RX 15-8
TX 0-7
TX 15-8
RX 0-15
TX 0-15
TX 0-15
RX 0-15
re-driver
re-driver
U74
U78
J17
Slim SAS
x8
Slim SAS
x8
JSLIM3
ASM1061
SATA controller
SATA0
SATA1
P1[15:0]
re-driver
re-driver
U79
U80
ASM1042
USB controller
ASM1042
USB controller
BMC
AST2500
P0 [6]
Rear
USB 3.0
X 2
VGA
USB_0_HSD1
COM1
PHY
RTL8211F
DDR4
BMC ROM
32MB
LPC
TPM
BIOS ROM
32 MB
MUX
SPI
SPI
IPMI LAN
RJ45
Rear
USB 3.0
X 2
P0 [4]
P0 [5]
M.2 Conn
M key
J34
MUX
P0 [3:2]
P0 [7]