Studer D424, Operating And Service Instructions

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D424 MO Recorder
E6/4 D424 - Circuits
SW V 1.6 Date printed: 06.03.02
6.2 Core
1.866.130
The Core fulfills the following tasks:
• Handling of the MO drive
• Data transfer between the different audio data interfaces, as Ethernet,
SCSI (MO drive), TDM bus
• Processing the control interfaces (Desktop Controller, Front Panel,
Sony 9-pin)
The digital signal processor (DSP) on the Core is responsible for cross
fades, computation of output levels, etc.
The main processor 68360 is the CPU of the MO recorder. It has several
serial interfaces for the communication with the front processor, the re-
motes, the monitoring interface (with IC107), the Ethernet interface etc.
The software is stored in the two Flash memories (IC104, 105). Communi-
cation with the MO drive is done via the SCSI controller (IC504). The
audio data are subdivided by the “ Word builder” (IC601), depending on
the audio word length and buffered in the SIMM-DRAM (IC402) sup-
ported by the Controllers (IC701). The link to the Motherboard is effected
by the bi-directional register (IC404) and the Dual Ported RAM (IC403)
with the Controller (IC401). The SCSI bus is actively terminated by IC503.
6.2.1 Jumper and DIP Switch Settings
The address for the Desktop Controller is normally set in the Setup menu.
On units without a front panel operating surface this has to be done with
DS1 (on from SW version 1.2).
The controller interface can be selected for operation with the Studer
Desktop Controller or with a customer-specific remote control; for this
purpose DIP switch No. 1 of DS1 is provided.
DS1:
4 3 2 1
Controller Port Operation Mode:
off x x x Operation with Studer Controller/31.25 kBd
on x x x Operation with Special Controller/38.4 kBd
Controller Address:
x x off off selectable on front panel
x x off on Address 1
x x on off Address 2
x x on on Address 3
J401 and J403 are always inserted.
All remaining jumpers remain open. They are used for matching to the DP
RAM size (J405 and J407), as programming connectors for IC 601/701
(P601...P610 and P701...P710), as a Debug connector for the DSP (IC302)
(P301...310) and the processor (IC102) (P111...120), or as monitoring in-
terface (P101...P103).