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List of figures

Figure 48.

USART Pinout configuration with STM32CubeMX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69

Figure 49.

USART2 setting with STM32CubeMX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70

Figure 50.

SWO Pin configuration with STM32CubeMX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72

Figure 51.

Semihosting/SWO configuration with IAR™ EWARM . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73

Figure 52.

IAR™ EWARM SWO Clock setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74

Figure 53.

SWO configuration with Keil

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75

Figure 54.

Access to SWV in Keil

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75

Figure 55.

Enable SWD in STM32CubeIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77

Figure 56.

Enable SWV ITM Data Console in STM32CubeIDE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78

Figure 57.

Enable ITM stimulus Port 0 in STM32CubeIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79

Figure 58.

Start Trace button in STM32CubeIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79

Figure 59.

Semihosting configuration in IAR™ EWARM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80

Figure 60.

Properties for semihosting in STM32CubeIDE- Source Location . . . . . . . . . . . . . . . . . . . . 81

Figure 61.

Properties for semihosting in STM32CubeIDE- Librairies . . . . . . . . . . . . . . . . . . . . . . . . . 82

Figure 62.

Properties for semihosting in STM32CubeIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82

Figure 63.

Semihosting in STM32CubeIDE – Debug configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . 84

Figure 64.

Semihosting in STM32CubeIDE – Startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85

Figure 65.

Semihosting in STM32CubeIDE – Run . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86

Figure 66.

MCO pin selection in STM32CubeMX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87

Figure 67.

MCO alternate pin highlight exemple with L073 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88

Figure 68.

MCO Multiplexer in STM32CubeMX Clock Configuration Pane . . . . . . . . . . . . . . . . . . . . . 89

Figure 69.

STM32F4/F7 dual MCO capabilities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91

Figure 70.

DBMCU Register LL Library Functions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95

Figure 71.

DBGMCU_CR HAL Library Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96

Figure 72.

Access to DBGMCU register with IAR™ EWARM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97

Figure 73.

EWARM C-SPY

Macro script setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98

Figure 74.

Accessing DBGMCU register in Keil

MDK-Arm µVision (1/2). . . . . . . . . . . . . . . . . . . . . . 99

Figure 75.

Accessing DBGMCU register in Keil

MDK-Arm µVision (2/2)) . . . . . . . . . . . . . . . . . . . . 100

Figure 76.

Keil

Initialization script setting. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101

Figure 77.

Access to Generator Options in STM32CubeIDE V2.0.0 . . . . . . . . . . . . . . . . . . . . . . . . . 102

Figure 78.

Generator Options debug MCU in STM32CubeIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103

Figure 79.

Access to DBGMCU settings with STM32CubeIDE V1.3.0 . . . . . . . . . . . . . . . . . . . . . . . 104

Figure 80.

Runtime R/W access to DBGMCU register with SSTM32CubeIDE . . . . . . . . . . . . . . . . . 105

Figure 81.

ST-LINK cuttable part of Nucleo . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106

Figure 82.

Using ST-LINK stand-alone part of Nucleo-L476RG as VCP . . . . . . . . . . . . . . . . . . . . . 107

Figure 83.

Virtual COM port on PC side . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108

Figure 84.

STM32CubeProgrammer target selection pick list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109

Figure 85.

Getting target ST-LINK S/N from the console. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110

Figure 86.

IAR™ EWARM Debug Probe Selection pop-up window . . . . . . . . . . . . . . . . . . . . . . . . . 110

Figure 87.

IAR™ EWARM Debug Probe Selection with nickname . . . . . . . . . . . . . . . . . . . . . . . . . . 111

Figure 88.

Probe selection prompt setting on IAR™ EWARM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111

Figure 89.

Keil

ST-LINK selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112

Figure 90.

Error message for multiple ST-LINK detected in STM32CubeIDE . . . . . . . . . . . . . . . . . . 113

Figure 91.

Forcing specific ST-LINK S/N with STM32CubeIDE with OpenOCD option. . . . . . . . . . . 114

Figure 92.

Forcing specific ST-LINK S/N with STM32CubeIDE with ST-LINK GDB server. . . . . . . . 115

Summary of Contents for STM32 Series

Page 1: ...cerns this application note provides a toolbox describing the most common debug techniques and their application to popular recommended IDEs for STM32 32 bit Arm Cortex MCUs It contains detailed information for getting started as well as hints and tips to make the best use of STM32 Software Development Tools in STM32 ecosystem This application note applies to the microcontrollers listed in Table 1...

Page 2: ... 2 2 1 STM32CubeMX 21 2 2 2 STM32CubeIDE 22 2 2 3 Partner IDEs 24 2 2 4 STM32CubeProgrammer 25 2 2 5 STM32CubeMonitor 27 2 3 Embedded software 28 2 4 Information and sharing 29 2 4 1 Documentation 30 2 4 2 Wiki platform 31 2 4 3 Github 31 2 4 4 ST Community 31 2 4 5 STM32 Education 32 3 Compiling for debug 33 3 1 Optimization 33 3 1 1 IAR EWARM 34 3 1 2 Keil MDK Arm µVision 35 3 1 3 STM32CubeIDE 3...

Page 3: ...chdog BxCAN and I2C 51 5 2 Debug performance 51 5 2 1 IAR EWARM 52 5 2 2 Keil MDK Arm µVISION 53 5 2 3 STM32CubeIDE 54 5 3 Secure platform limitation 55 5 3 1 RDP 55 5 3 2 PCROP 56 6 Exception handling 57 6 1 Default weak Handlers 57 6 2 Custom Handlers 58 6 3 Trapping div 0 exception 60 6 3 1 Cortex M0 M0 case 60 6 3 2 Cortex M3 4 7 case 61 7 Printf debugging 68 7 1 STM32 Virtual COM port driver ...

Page 4: ...COConfig 89 8 2 3 STM32 Series differences 90 9 Dual Core microcontroller debugging 92 10 From debug to release 93 11 Troubleshooting 94 Appendix A Managing DBGMCU registers 95 A 1 By software 95 A 2 By debugger 96 Appendix B Use Nucleo cuttable ST LINK as stand alone VCP 106 Appendix C Managing various targets on the same PC 109 Appendix D Cortex M debug capabilities reminder 116 D 1 Application ...

Page 5: ...k 19 Table 3 STMicroelectronics documentation guide 30 Table 4 STM32 Series RDP protection extension 56 Table 5 STM32 USART vs PC terminal WordLength example 71 Table 6 Troubleshooting 94 Table 7 STM32 Series vs debug capabilties 116 Table 8 STM32 Series vs debug capabilities 116 Table 9 Document revision history 117 ...

Page 6: ...TM32CubeIDE debug information option 39 Figure 24 SWD pins PA13 and PA14 in Reset state under STM32CubeMX 40 Figure 25 SWD pins PA13 and PA14 in Reserved but inactive state under STM32CubeMX 41 Figure 26 SWD pins PA13 and PA14 in Active State under STM32CubeMX 41 Figure 27 Reset Mode in IAR8 10 screenshot 43 Figure 28 Connect and Reset option Keil 44 Figure 29 Keil hotplug step1 45 Figure 30 Keil ...

Page 7: ...apabilities 91 Figure 70 DBMCU Register LL Library Functions 95 Figure 71 DBGMCU_CR HAL Library Functions 96 Figure 72 Access to DBGMCU register with IAR EWARM 97 Figure 73 EWARM C SPY Macro script setting 98 Figure 74 Accessing DBGMCU register in Keil MDK Arm µVision 1 2 99 Figure 75 Accessing DBGMCU register in Keil MDK Arm µVision 2 2 100 Figure 76 Keil Initialization script setting 101 Figure ...

Page 8: ...he tools IAR EWARM V8 32 3 Keil MDK Arm µVision V5 26 STM32CubeIDE V1 3 0 STM32CubeProg V2 2 1 1 3 Acronyms AN Application note CMSIS Cortex microcontroller software interface standard HAL Hardware abstraction layer software library IDE Integrated development environment JTAG Joint Test Action Group MCO Microcontroller clock output MCU Microcontroller unit NVIC Nested vector interrupt controller P...

Page 9: ...igure 1 STM32 ecosystem overview This chapter provides a global overview of the main elements composing the ecosystem outlining debug features and useful pointers in order to guide the user among available resources 2 1 Hardware development tools This section introduces the range of available development tools from hardware kits to ST LINK probes and alternative debugger interfaces 2 1 1 Hardware ...

Page 10: ...igure 3 Nucleo 144 Nucleo 64 and Nucleo 32 boards STM32 Nucleo boards feature the same connectors They can easily be extended with a large number of specialized application hardware add ons Note Nucleo 144 boards include ST Zio connector which is an extension of ARDUINO Uno rev3 and ST morpho connector Nucleo 68 board and Nucleo 64 boards include ARDUINO Uno rev3 and ST morpho connectors Nucleo 32...

Page 11: ...need for a separate probe The figure below shows an example of STM32 Nucleo structure Figure 4 STM32 Nucleo 144 structure A complete description of the embedded ST LINK features is provided in Section 2 1 2 ST LINK probe on page 16 Additional information and access to Nucleo boards complete documentation sets are available at www st com ...

Page 12: ...examples allow to fully benefit from the devices features and added values Figure 5 Discovery board example Extension connectors give access to most of the device s I Os and make the connection of add on hardware possible With the integrated debugger programmer the Discovery kits are ideal for prototyping A complete description of the embedded ST LINK features is provided in Section 2 1 2 ST LINK ...

Page 13: ...1 3 Alternative debugger probes on page 19 The usage of a stand alone probe may require some jumper and solder bridge adaptation from default Refer to the specific board user manual For further information and access to complete documentation visit www st com stm32evaltools STM32 nucleo expansion STM32 Nucleo expansion boards carry all the required components to Evaluate ST devices to be used toge...

Page 14: ...sis dynamic measurement up to 50 mA with 100 kHz bandwidth The X NUCLEO LPM01A operates either in standalone mode using its LCD joystick and button to display static measurements or in controlled mode connected to host PC via USB using the STM32CubeMonPwr software tool with its comprehensive graphical user interface It can be used to supply and measure the consumption of STM32 Nucleo 32 Nucleo 64 ...

Page 15: ...ergy measurement computation by power measurement time integration Execution of EEMBC ULPMark tests Mode standalone Monochrome LCD 2 lines of 16 characters with backlight 4 direction joystick with selection button Enter and Reset push buttons Mode controlled Connection to a PC through USB FS Micro B receptacle Command line Virtual COM port or STM32CubeMonitor Power PC tool Four status LEDs Target ...

Page 16: ...ion board It is available as Stand alone in circuit debugger Embedded in all STM32 hardware kits Nucleo boards Discovery kits EVAL boards ST LINK V2 and ST LINK V3 are the main used versions Figure 8 shows ST LINK V2 and ST LINK V2 ISOL stand alone probes on the right Figure 8 ST LINK ST LINK V2 and ST LINK V2 ISOL stand alone probes Figure 9 shows the last STLINK V3SET version Figure 9 STLINK V3S...

Page 17: ...AN4989 Rev 3 17 118 AN4989 STM32 ecosystem outlines 117 Figure 10 shows an example of an embedded ST LINK V2 as part of a Nucleo board Figure 10 On board ST LINK V3 on Nucleo ...

Page 18: ...atures depends on software version ST LINK V3 basic features Stand alone probe with modular extensions Self powered through a USB connector Micro B USB 2 0 high speed compatible interface Direct firmware update support DFU JTAG serial wire debugging SWD specific features 3 V to 3 6 V application voltage support and 5 V tolerant inputs Flat cables STDC14 to MIPI10 STDC14 MIPI20 connectors with 1 27...

Page 19: ...the latest firmware version of the on board ST LINK interface Firmware upgrade can be performed thanks to the STM32CubeProgrammer refer to Section 2 2 4 STM32CubeProgrammer or STM32CubeIDE 2 1 3 Alternative debugger probes J LINK Segger I Jet IAR Systems and U LINK Keil are the most common alternatives providing features equivalent to the ones provided by ST LINK For most advanced debugging needs ...

Page 20: ...software tools It encompasses traditional integrated development environments IDEs with C C compilers and debuggers from major third parties that are complemented with tools from ST allowing to configure and initialize the MCU or monitor its behavior in run time It offers a complete flow from configuration up to monitoring as illustrated in Figure 11 Figure 11 STM32 software development ...

Page 21: ...rming MCU peripheral configuration GPIO USART and others and middleware stacks USB TCP IP and others Finally the user launches the generation of the initialization C code based on the selected configuration This code is ready to be used within several development environments The user code is kept at the next code generation Key features Intuitive STM32 microcontroller selection Rich graphical use...

Page 22: ...unctionalities to offer all in one tool experience and save installation and development time After the selection of an empty STM32 MCU or MPU or preconfigured microcontroller from the selection of a board the project is created and initialization code generated At any time during the development the user can return to the initialization and configuration of the peripherals or middleware and regen...

Page 23: ...pse CDT with support of Eclipse add ons GNU C C for Arm toolchain and GDB debugger Additional advanced debug features including CPU core peripheral register and memory views Live variable watch view System analysis and real time tracing SWV CPU fault analysis tool Support of ST LINK STMicroelectronics and J Link SEGGER debug probes Import project from Atollic TrueSTUDIO and AC6 System Workbench fo...

Page 24: ...ace in circuit debugging probes Power debugging to visualize power consumption in correlation with source code Run time libraries including source code Relocating Arm assembler Linker and librarian tools C SPY debugger with Arm simulator JTAG support and support for RTOS aware bugging on hardware RTOS plugins available from IAR Systems and RTOS vendors Over 3100 sample projects for EVAL boards fro...

Page 25: ... M devices Arm C C compilation toolchain uVision IDE debugger and simulation environment CMSIS Cortex Microcontroller Software Interface Standard compliant ST LINK support Multi language support English Chinese Japanese Korean 2 2 4 STM32CubeProgrammer STM32CubeProgrammer STM32CubeProg is an all in one multi OS software tool for programming STM32 products It provides an easy to use and efficient e...

Page 26: ...ories with examples of external Flash loaders to help users to develop loaders for specific external memories Automates STM32 programming erase verify programming configuring option bytes Allows OTP memory programming Supports the programming and configuring of option bytes Offers a command line interface for automation through scripting ST LINK firmware update Enables secure firmware creation usi...

Page 27: ...or mobile phones Moreover with the direct support of the Node RED open community STM32CubeMonitor allows an unlimited choice of extensions to address a wide diversity of application types Key Features Graphical flow based editor with no programming needed to build dashboards Connects to any STM32 device via ST LINK SWD or JTAG protocols Reads and writes variables on the fly from and to the RAM in ...

Page 28: ...mance and runtime efficiency A collection of Middleware components like RTOS USB library file system TCP IP stack Touch sensing library or Graphic Library depending on the MCU series A complete set of code examples running on STMicroelectronics boards STM32 Nucleo Discovery kits and EVAL boards Tip There is a fair chance that a Cube Project example matches the project in design At project start or...

Page 29: ...ystem outlines 117 Figure 16 STM32CubeProjectList screenshot 2 4 Information and sharing STMicroelectronics offers a very complete and wide range of solution on the web to get connected to STM32 World Figure 17 Get connected to STM32 world ...

Page 30: ...Content DB Data Brief Preliminary Product Specification before complete maturity DS Data sheet Product Specifications Hardware feature and Electrical Characteristics Pinout Alternate function definition table Memory Map Electrical Characterization etc RM Reference manual How to use the targeted microcontroller series memory and peripherals registers details default reset value etc AN Application n...

Page 31: ... easily store manage track and control their code GitHub features such as Pull requests promote co development enabling the community to propose alternate solutions and new features taking advantage of GitHub s change handling structures In addition GitHub Issues the privileged communication channel between developers lets users submit problems share solutions and contribute to fixes The move to G...

Page 32: ...esources created by STMicroelectronics engineers for bringing an STM32 project to life On this site a user learns at his own pace watches classes as per his own schedule anytime anywhere on any device or apply to one of the live learning sessions led by STMicroelectronics experts at a nearby location Content Online Training MOOC Videos Webinar Textbooks ST training courses Partner training courses...

Page 33: ...ize performance and or code size In most cases this reduces or even prevents program debugging The most common symptoms resulting from code optimization are Problem to set or reach a breakpoint Some lines are not accessible Impossibility to evaluate a variable watch feature Inconsistency while stepping what I get is not what I see Therefore for efficient debugging it is recommended to modify the c...

Page 34: ...Compiling for debug AN4989 34 118 AN4989 Rev 3 3 1 1 IAR EWARM In Project option C C Compiler Optimization Figure 18 IAR EWARM Optimization option ...

Page 35: ...ion In Project Option for Target C C Optimization Figure 19 Keil µVision Code Optimization option Keil documentation suggests that Level1 O1 can be a suitable alternative for debug Refer to www keil com support page Compiler optimization levels and the debug view for details ...

Page 36: ...st compilation and a good debugging experience 3 2 Debugging information Debugging information is generated by the compiler together with the machine code It is a representation of the relationship between the executable program and the original source code This information is encoded into a pre defined format and stored alongside the machine code Debugging information is mandatory to set breakpoi...

Page 37: ...AN4989 Compiling for debug 117 3 2 1 IAR EWARM Generate debug information option tick box is accessible in Project Options C C Compiler Output Pane It is set by default Figure 21 IAR EWARM Generate debug Information option ...

Page 38: ...mpiling for debug AN4989 38 118 AN4989 Rev 3 3 2 2 Keil MDK Arm µVision Debug Information Tick box is accessible in Project Options Output Pane It is set by default Figure 22 Keil Debug Information option ...

Page 39: ...which no debug is planned This includes descriptions of functions and external variables and line number tables but no information about local variables Default g Produce debugging information in the operating system s native format stabs COFF XCOFF or DWARF GDB can work with this debugging information Maximal g3 Level 3 includes extra information such as all the macro definitions present in the p...

Page 40: ...work Special attention must be paid to make sure that voluntarily or accidentally the SWD pins are not switched to some alternate functions or affected by I O settings modifications Hint For instance STM32Cube PWR examples switch all GPIO including SWD in an analog state in order to minimize consumption This disconnects the debugger A Connect Under Reset using NRST is required to take back the con...

Page 41: ...ce Asynchronous SW together with SWO Refer to Section 7 3 on page 71 This is the only way by which STM32CubeMX protects the I O from being selected for another use during the configuration process by highlighting the conflict to the user JTAG is not available on Nucleo and Discovery boards On EVAL boards it is available through a dedicated 20 pin connector Nevertheless in STM32CubeMX SWD remains t...

Page 42: ...B12 is not OFF Software write to core register System Core and all Peripheral SOC IPs are reset Core Only Arm Cortex is reset Connection mode can be either Normal Debugger takes control through JTAG SWD port and starts execution after a software reset This is working only if JTAG SWD is available GPIO correctly configured and clocked FCLK or HCLK enabled Main Power domain or Low Power debug active...

Page 43: ...lt Normal Connection Software System Reset prior to jump at main Core Normal Connection Software Core Reset prior to jump at main Software Normal Connection No Reset prior to jump and stop at main Hardware Normal Connection Assert NRST MCU pin prior to jump to main Connect during reset Connection while asserted Hardware NRST Hotplug connection is accessible with Attach to running Target function i...

Page 44: ...he currently executed instruction after connecting with Pre reset applies a hardware reset HW RESET before connecting to the device under Reset holds the hardware reset HW RESET signal active while connecting to the device Use this option when the user program disables the JTAG SW interface by mistake Reset after Connect performs if enabled a reset operation as defined in the Reset drop down list ...

Page 45: ...ortex M core and on chip peripherals are reset VECTRESET performs a software reset by setting the VECTRESET bit Only the Cortex M core is reset On chip peripherals are not reset For some Cortex M devices VECTRESET is the only way they may be reset However VECTRESET is not supported on Cortex M0 Cortex M0 Cortex M1 and Arm v8 M cores Refer to http www keil com Hotplug If all of the following option...

Page 46: ...Connecting to the board AN4989 46 118 AN4989 Rev 3 Figure 30 Keil hotplug step2 ...

Page 47: ...to analyze the memory and register content Because Options For Target Debug Load Application at startup is disabled the debugger does not have any application program and debug information To load this information into the debugger use the LOAD debugger command with the option NORESET or INCREMENTAL LOAD can be automated using an Initialization File under Options For Target Debug To go further ref...

Page 48: ...t under reset asserts hardware reset and then connects to the target under reset Reset Mode as None performs a hardware reset and then connects to the target Reset Mode as Software system reset does not perform any hardware reset but connects to the target and performs a software system reset In case of problem to connect to the board with STM32CubeIDE make sure that NRST from ST LINK is properly ...

Page 49: ...eset mode Software system reset Resets all STM32 components except the Debug via the Cortex M application interrupt and reset control register AIRCR Hardware reset Resets the STM32 device via the nRST pin The RESET pin of the JTAG connector pin 15 must be connected to the device reset pin Core reset Resets only the core Cortex M via the AIRCR Figure 34 STM32CubeProgrammer Connection mode ...

Page 50: ...es are used This is due to the fact that the Cortex M core is not clocked in any of these modes However the setting of dedicated configuration bits in the DBGMCU_CR register allows software debug even when the low power modes are used extensively Refer to the PWR and DBG sections of the reference manual for details Appendix A Managing DBGMCU registers on page 95 guides the user through the various...

Page 51: ... during a breakpoint For the I2 C the user can choose to block the SMBUS timeout during a breakpoint Those options are accessible in DBGMCU freeze registers DBGMCU_APB1FZR1 DBGMCU_APB1FZR2 which can be written by the debugger under system reset If the debugger host does not support these features it is still possible to write these registers by software Refer to Appendix A Managing DBGMCU register...

Page 52: ...Breaking and stepping into code AN4989 52 118 AN4989 Rev 3 5 2 1 IAR EWARM In Project Option ST LINK Interface speed Figure 35 IAR EWARM ST LINK SWD Speed setting ...

Page 53: ...89 Rev 3 53 118 AN4989 Breaking and stepping into code 117 5 2 2 Keil MDK Arm µVISION SWD Speed setting is accessible in Project Options for Target Debug Settings Target Com Figure 36 Keil SWD Speed Setting ...

Page 54: ...tor Options in STM32CubeIDE V2 0 0 Note SWD communication is always possible on all ST boards whereas JTAG is only present on EVAL boards SWD communication is always present on all Cortex M devices whereas JTAG is not present on Cortex M0 devices Refer to Appendix D on page 116 for a complete overview of debug capabilities for each Cortex M type ...

Page 55: ...ase operations For further details please refer to the reference manual or section Training L4 on STMicroelectronics website www st com The next sections provide additional details on the expected behavior of the secure applications 5 3 1 RDP Level 0 No Protection This is the factory default mode allowing all accesses Level 1 Read Protection Any access to Flash or protection extension region gener...

Page 56: ...DP Level 1 to RDP Level 0 5 leads to a partial Flash memory erase only the non secure part is erased Note Refer to AN5421 and AN5347 for more informations about Trustzone development on STM32L5 Series 5 3 2 PCROP Proprietary Code ReadOut Protection is the ability to define secure area in Flash where user can locate a proprietary code This prevents malicious software or debugger from reading sensit...

Page 57: ...STACK DCD Reset_Handler Reset Handler DCD NMI_Handler NMI Handler DCD HardFault_Handler Hard Fault Handler DCD 0 Reserved DCD 0 Reserved DCD 0 Reserved DCD 0 Reserved DCD 0 Reserved DCD 0 Reserved DCD 0 Reserved DCD SVC_Handler SVCall Handler DCD 0 Reserved DCD 0 Reserved DCD PendSV_Handler PendSV Handler DCD SysTick_Handler SysTick Handler Nothing is trigged on debugger side and application looks...

Page 58: ...errupt are selected the following code is generated void NMI_Handler void USER CODE BEGIN NonMaskableInt_IRQn 0 USER CODE END NonMaskableInt_IRQn 0 USER CODE BEGIN NonMaskableInt_IRQn 1 USER CODE END NonMaskableInt_IRQn 1 brief This function handles Hard fault interrupt void HardFault_Handler void USER CODE BEGIN HardFault_IRQn 0 USER CODE END HardFault_IRQn 0 while 1 USER CODE BEGIN HardFault_IRQ...

Page 59: ... code depends on the IDE IAR EWARM and STM32CubeIDE void NMI_Handler void ifdef DEBUG asm BKPT 0 endif Keil void NMI_Handler void ifdef DEBUG __asm BKPT 0 endif For each IDE it is also possible to use the abstraction function defined in the CMSIS library and provided in STM32Cube software pack void NMI_Handler void ifdef DEBUG __BKPT 0 endif In all cases the Halt Debug Mode is entered it allows to...

Page 60: ...targets that do not support hardware division instructions SDIV UDIV integer division by zero errors can be trapped and identified by means of the appropriate C library helper functions __aeabi_idiv0 When integer division by zero is detected a branch to __aeabi_idiv0 is made A breakpoint placed on __aeabi_idiv0 allow to trap the division by zero To ease the breakpoint application override the defa...

Page 61: ...CB_CCR Description Refer to STM32F10xxx 20xxx 21xxx L1xxxx Cortex M3 programming manual PM0056 Setting bit 5 of SCB_CCR register SCB CCR 0x10 enable div by 0 trap When Div0 occurs it is trapped in HardFault_Handler With breakpoint on while instruction into HardFault_Handler CallStack point to the offended line and SCB CFSR register explicits the type of fault SCB_CFSR register description is provi...

Page 62: ...18 AN4989 Rev 3 IAR EWARM Detailed R W access to the values of each SCB registers bits at runtime can be obtained through View Register System Control Block from Pick List as shown in Figure 42 Figure 42 IAR EWARM exception handling ...

Page 63: ...9 Exception handling 117 Keil MDK Arm µVISION SCB CCR can be managed at run time through View System Viewer Core Peripheral System Control and Configure Refer to Figure 43 for details Figure 43 Keil System Control and Configure ...

Page 64: ...Exception handling AN4989 64 118 AN4989 Rev 3 The fault type can be investigated using Peripherals Core Peripherals Fault Reports as shown in Figure 44 Figure 44 Keil Fault Reports ...

Page 65: ...hrough Window Show View SFRs as shown in Figure 45 Figure 45 STM32CubeIDE SCB register access If you need more informations about the Hardfault you can first enable faulting or halting when the processor executes an SDIV or UDIV instruction with a divisor of 0 SCB CCR 0x01 At runtime before pressing resume button open Fault Analyzer in Window Show View Fault Analyzer ...

Page 66: ...on handling AN4989 66 118 AN4989 Rev 3 If the code performs an SDIV or UDIV instruction with a divisor of 0 code stops with informations in Fault Analyzer see Figure 46 Figure 46 Fault Analyzer in STM32CubeIDE ...

Page 67: ...FR 0x 08x n SCB CSFR print while 1 The same content can as well be obtained directly from the memory with any memory browser Other faults like UNALIGNED UNDEFINSTR can be managed in a similar way For more details refer to the relevant programming manual STM32F4 and STM32L4 Series Cortex M4 programming manual PM0214 STM32F7 Series Cortex M7 processor programming manual PM0253 Relevant information i...

Page 68: ...onics hardware kits and ecosystem tools 7 1 STM32 Virtual COM port driver STM32 Virtual COM Port Driver VCP is a feature supported by ST LINK V2 B embedded in most of recent hardware kits refer to Section 2 1 Hardware development tools on page 9 It is a RS232 emulation through ST LINK USB connection On the PC side this requires driver software package STSW STM32102 included in ST LINK driver STSW ...

Page 69: ...h PC host is to use the USART connected to VCP USART connected to VCP depends on the hardware kit Nucleo 32 Nucleo 64 USART2 PA2 PA3 Nucleo 144 USART3 PA9 PA10 Discovery not standard Refer to the board schematics EVAL not standard Refer to the board schematics Either the VCP or the RS232 connector can be used In STM32CubeMX for Nucleo board the VCP USART pins PA2 PA3 are reserved by default but re...

Page 70: ...ain For IAR EWARM and Keil MDK Arm µVISION this is done by overriding the stdio fputc function include stdio h int fputc int ch FILE f HAL_UART_Transmit UartHandle uint8_t ch 1 0xFFFF return ch For GCC based toolset like STM32CubeIDE two cases can be met With syscall c integrated to the project include stdio h int __io_putchar int ch ...

Page 71: ... communication channel available on Cortex M3 M4 M7 and supported by the main debugger probes It is using the ITM instrumentation trace macrocell module of the Cortex Core Sight The asynchronous mode SWO requires 1 extra pin and is available on all packages for STM32 based on Cortex M3 M4 and M7 It is only available if a Serial Wire mode is used It is not available in JTAG mode By default this pin...

Page 72: ... ITM trace information used for simple printf style debugging This chapter only addresses the printf style debugging feature In order host debugger can manage flexible pin assignment ensure SWO pin is not used for other purpose In STM32CubeMX Select Trace Asynchronous Sw in SYS Debug selection box as shown in Figure 50 Figure 50 SWO Pin configuration with STM32CubeMX This secures that the PB3 is n...

Page 73: ...rated access to SWO Redirection of printf and scanf is possible using Library Configuration options as shown in Figure 51 Figure 51 Semihosting SWO configuration with IAR EWARM Care must be taken that clock setup is correct by using ST LINK Communication Pane as illustrated in Figure 52 ...

Page 74: ...t configurable Keil MDK Arm µVISION In MDK Arm it is required to redirect printf to SWO by some piece of code following same model as for UART Refer to Section 7 2 Printf via UART on page 69 include stdio h int fputc int ch FILE f ITM_SendChar ch return ch Keil must be properly configured for the SWO communication to be properly set An example is given in Figure 53 In Projet Option Debug Probe Set...

Page 75: ...in debug through View Serial Windows Debug prinf Viewer as shown in Figure 54 Figure 54 Access to SWV in Keil Tip Keil MDK Arm µVISION allow to select the Stimulus to display On the other hand it is quite straight forward to make some clone of ITM_SendChar function using any of the 31 stimulus port Can be useful in a very verbose system to set a trace ...

Page 76: ... to SWO by some piece of code With syscall c integrated to the project include stdio h int __io_putchar int ch ITM_SendChar ch return ch Without syscall add int _write int file char ptr int len int DataIdx for DataIdx 0 DataIdx len DataIdx __io_putchar ptr return len Enable SWD in Debug configuration Debugger pane see Figure 55 Core clock must be the same as Cortex clock You can then start the deb...

Page 77: ...AN4989 Rev 3 77 118 AN4989 Printf debugging 117 Figure 55 Enable SWD in STM32CubeIDE Enable SWV ITM Data Console in Window Show View SWV SWV ITM Data Console as shown in the figure below ...

Page 78: ...Printf debugging AN4989 78 118 AN4989 Rev 3 Figure 56 Enable SWV ITM Data Console in STM32CubeIDE Enable ITM Stimulus Port 0 after clicking on Configure trace as shown in the below figure ...

Page 79: ...O For example this mechanism can be used to enable functions in the C library such as printf and scanf It can also allow to use the screen and keyboard of the host instead of having a screen and keyboard on the target system This is useful because development hardware often does not have all the input and output facilities of the final system Semihosting enables the host computer to provide these ...

Page 80: ...RM provides a highly integrated semihosting feature enabled by default Figure 59 shows how to check if it is the case for the project in Options General options Library Configuration Pane Figure 59 Semihosting configuration in IAR EWARM In such a case simply use printf scanf functions in the code Input and output of the program are displayed in the Terminal I O window 7 4 2 Keil MDK Arm µVISION Ke...

Page 81: ...on the arrow near to Project name Core and select Filter empty Then click on Edit filter button and add syscall c to the Exclusion patterns list Figure 60 Properties for semihosting in STM32CubeIDE Source Location To use semihosting the librdimon must be enabled Librdimon implements the semihosting versions of syscalls from newlib On the left side pane go into C C Build Settings and select the Too...

Page 82: ...32CubeIDE Librairies Next select MCU GCC Linker Miscellaneous while still in the Tool Settings tab Click the Add button and enter specs rdimon specs into the dialog box This add the linker flags in order to include the librdimon library Figure 62 Properties for semihosting in STM32CubeIDE ...

Page 83: ...d extern void initialize_monitor_handles void Then configure the semihosting system call In int main void before the while 1 loop USER CODE 1 section add Initialise_monitor_handles Then inside the while 1 loop add Printf Hello World n HAL_Delay 1000 Click Project Build Project to compile and link everything ...

Page 84: ...n Debug configuration Debugger tab change the debugger probe to ST LINK Open OCD In Generator options choose Software system reset as reset Mode Figure 63 Semihosting in STM32CubeIDE Debug configuration In the Startup tab enter the command monitor arm semihosting enable ...

Page 85: ...AN4989 Rev 3 85 118 AN4989 Printf debugging 117 Figure 64 Semihosting in STM32CubeIDE Startup Click on Debug button ...

Page 86: ...ging AN4989 86 118 AN4989 Rev 3 Run In the debugging perspective click Run Resume and you should see Hello World being printed at the bottom of the console once per second Figure 65 Semihosting in STM32CubeIDE Run ...

Page 87: ...type In most cases a large number of GPIOs are covered In order to use this coverage at best the user is advised to study the board schematics that show the connections between the MCU pins and the connectors In association with the schematics the board user manual presents the jumper and solder bridge configurations that modify the routing of pins to connectors 8 2 Microcontroller clock output MC...

Page 88: ...please refer to the board schematics Depending on board or and chip families other pins can be used if needed and available The Ctrl click on RCC_MCO pin command sequence under STM32CubeMX highlights in blue the alternate pin An example is shown in Figure 67 Figure 67 MCO alternate pin highlight exemple with L073 STM32CubeMX Clock Configuration pane selects the signal to route to pin and the divid...

Page 89: ...ml which configure the GPIO and the related registers depending on source and divider They also configure the selected GPIO accordingly Configure the MCO1 pin in alternate function mode GPIO_InitStruct Pin MCO1_PIN GPIO_InitStruct Mode GPIO_MODE_AF_PP GPIO_InitStruct Speed GPIO_SPEED_HIGH GPIO_InitStruct Pull GPIO_NOPULL GPIO_InitStruct Alternate GPIO_AF0_MCO HAL_GPIO_Init MCO1_GPIO_PORT GPIO_Init...

Page 90: ...d overshoot undershoot 8 2 3 STM32 Series differences STM32L4 Series also provides an LSCO Low Speed Clock Output on PA2 in order to output LSE or LSI same as MCO but with benefit to be still available during stop and standby mode Refer to section 6 2 15 Clock out capability of STMicroelectronics reference manual STM32L4x5 and STM32L4x6 advanced Arm based 32 bit MCUs RM035 for details HAL Function...

Page 91: ...AN4989 Rev 3 91 118 AN4989 Debug through hardware exploration 117 Figure 69 STM32F4 F7 dual MCO capabilities ...

Page 92: ... different for these dual core microcontrollers as we need a simultaneous debug of both cores using a single hardware debug probe Note Refer to AN5286 and AN5361 both available on st com which explain how to proceed to debug dual core with IAR EWARM AN5286 MDK Arm AN5286 and STM32CubeIDE AN5361 Dual debug is supported using STM32CubeIDE IAR EWARM starting from version 8 30 or MDK Arm version v5 25...

Page 93: ...blem while releasing the application The following action list can be used as a checklist helping to avoid the most common problems Remove software BKPT instructions or take care to let them inside ifdef DEBUG statements Ensure printf uses available data path on final product Semihosting and SWO cause hardfault otherwise Reestablish Code Optimization level Implement proper Fault Handlers Reset DBG...

Page 94: ...ister is OFF Beware that this register is reset only with a POR power on reset Refer to Section 4 3 Fail to connect to a board with Normal System Reset Try ConnectUnderReset Hardware Reset connection mode This resets SWD connection in case it has been disabled by application Refer to Section 4 2 Fail to connect on board using ConnectUnderReset Hardware using ST LINK Ensure NRST of ST LINK is prope...

Page 95: ...registers with various tools and IDEs A 1 By software HAL and LL provide functions to set reset DBGMCU registers Refer to STM32Cube Repository STM32Cube_FW_ MCU _ Version Drivers STM32 MCU xx_HAL_Driver STM32 MCU xx_User_Manual chm Figure 70 and Figure 71 show the positions of the DBGMCU registers iwithin the LL and HAL libraries Figure 70 DBMCU Register LL Library Functions ...

Page 96: ...manual prior to be written RCC APB2ENR RCC_APB2ENR_DBGMCUEN Some HAL macros are also available to Enable Disable this clock __HAL_RCC_DBGMCU_CLK_ENABLE HAL_DBGMCU_EnableDBGStopMode HAL_DBGMCU_EnableDBGStandbyMode HAL_DBGMCU_EnableDBGSleepMode __HAL_RCC_DBGMCU_CLK_DISABLE A 2 By debugger In order to avoid debugging specific lines in the source code there are several possibilities to set DBGMCU regi...

Page 97: ...ugh the register window as shown in Figure 72 Figure 72 Access to DBGMCU register with IAR EWARM In case a more permanent setup is required EWARM C SPY debugger macros enable to define execUserSetup which is executed at debugger start prior to program execution Figure 73 shows the Project Option Debugger Setup Pane ...

Page 98: ...AR Macro n __writeMemory32 0x00400000 0x40021034 Memory Enable clock DBG __writeMemory32 0x00000007 0x40015804 Memory Enable low power Debug in DBG_CR __writeMemory32 0x00000001 0x40015808 Memory DBG_APB1_FZ Timer2 Stop Enable For further information about feature offer by C SPY macros please refer to C SPY Debugging Guide available in IAR Help Menu and on www iar com Note IAR EWARM enables Low Po...

Page 99: ... 99 118 AN4989 Managing DBGMCU registers 117 Keil MDK Arm µVision At runtime access to the DBGMCU register is possible through View System Viewer DBG Figure 74 Accessing DBGMCU register in Keil MDK Arm µVision 1 2 ...

Page 100: ... use Keil MDK Arm µVision initialization file capability Debugger script files are plain text files that contain debugger commands These files are not created by the tools The user must create them to suit his specific needs Typically they are used to configure the debugger or to setup or initialize something prior to running the program Figure 76 shows initialization script setting in Project opt...

Page 101: ... DBGMCU registers on M0 based MCU Clock enabling FUNC void DBGMCUSetup void DBGMCU configuration _WDWORD 0x40021034 0x00400000 Enable clock DBG _WDWORD 0x40015804 0x00000007 DBG_CR _WDWORD 0x40015808 0x00000001 DBG_APB1_FZ DBGMCUSetup For further information regarding Keil MDK Arm µVision initialization script refer to http www keil com ...

Page 102: ...setting can be changed through Run Debug Configurations Debugger Pane Setting up with OpenOCD server By clicking on the Show generator options as presented in the figure below Figure 77 Access to Generator Options in STM32CubeIDE V2 0 0 DBGMCU options are available under Reset Mode in the Mode Setup group as shown in Figure 78 ...

Page 103: ...AN4989 Rev 3 103 118 AN4989 Managing DBGMCU registers 117 Figure 78 Generator Options debug MCU in STM32CubeIDE ...

Page 104: ...GMCU registers AN4989 104 118 AN4989 Rev 3 Figure 79 Access to DBGMCU settings with STM32CubeIDE V1 3 0 If needed the DBGMCU value can be changed at run time through the I O Registers window as shown in Figure 80 ...

Page 105: ... 80 Runtime R W access to DBGMCU register with SSTM32CubeIDE Note All DBGMCU registers values are kept while reset Pay attention to not let a debug or unwanted state when returning to normal execution refer to Chapter 9 Dual Core microcontroller debugging on page 92 ...

Page 106: ...r capacity to disconnect on board ST LINK from STM32 application part The simple way to disconnect the ST LINK part from the MCU application part is to power off the MCU by removing jumper J5 This is indicated by the fact that LED LD3 is off when a USB cable is connected This configuration is presented in As show in Figure 81 Figure 81 ST LINK cuttable part of Nucleo In this case the ST LINK part ...

Page 107: ...on of UART1 to the host UART1 RX PC5 is routed via Morpho Connector CN10 Pin 6 to CN3 TX of NUCLEO L476RG ST LINK UART1 TX PC4 is routed via Morpho Connector CN10 Pin 34 to CN3 RX of NUCLEO L476RG ST LINK Figure 82 Using ST LINK stand alone part of Nucleo L476RG as VCP With this setup on the PC side two Virtual COM ports are available with potentially two different serial channels 1 Nucleo F302R8 ...

Page 108: ...89 108 118 AN4989 Rev 3 Figure 83 Virtual COM port on PC side Note This usage implies to have several targets connected to a single host PC In order to properly identify the target and the VCP refer to Appendix C Managing various targets on the same PC ...

Page 109: ... a serial number In order to correlate a serial number with a board it is advised to use STM32CubeProgrammer At the top of the screen the serial number pick list contains all connected ST LINK probes By selecting one access to the target is generated making blinking of the related ST LINK LED switch from red to green Figure 84 STM32CubeProgrammer target selection pick list Once the target is ident...

Page 110: ... IAR EWARM The first time a debug session is launched while several targets are connected a Debug Probe Selection window pops up A list of connected targets is displayed identified by the last four bytes of the ST LINK S N as illustrated in Figure 86 Figure 86 IAR EWARM Debug Probe Selection pop up window It is recommended to use the Edit Nickname feature to ease board identification in anticipati...

Page 111: ...indow is displayed only at first time The selection made is then applied by default to further connections Changing this initial selection requires that the Debug Probe Selection display is forced by setting the Always prompt for probe selection option in Option ST LINK Setup as shown in Figure 88 Figure 88 Probe selection prompt setting on IAR EWARM ...

Page 112: ...igure 89 Keil ST LINK selection In the Debug Adapter section the pick list allows to select among all connected targets At selection it can be observed a brief activity of the ST LINK LED of the related board and the Serial Number is displayed The selection is stored for the next connections STM32CubeIDE If you try to launch a debug session with two ST LINK connected a pop up message appear as sho...

Page 113: ...K detected in STM32CubeIDE Setting up with OpenOCD rIt is possible to force the connection to a specific target using the ST LINK S N In Run Debug Configurations Debugger Pane add the following OpenOCD option c hla_serial ST LINK S N Figure below illustrates the setting of an OpenOCD option for forcing a connection ...

Page 114: ...Managing various targets on the same PC AN4989 114 118 AN4989 Rev 3 Figure 91 Forcing specific ST LINK S N with STM32CubeIDE with OpenOCD option Setting up with ST LINK GDB server ...

Page 115: ...AN4989 Rev 3 115 118 AN4989 Managing various targets on the same PC 117 Figure 92 Forcing specific ST LINK S N with STM32CubeIDE with ST LINK GDB server ...

Page 116: ...32 Series Cortex type SWD JTAG ETM SWO Hardware breakpoints Core Reset MCO 1 L0 F0 M0 0 Yes No No No 4 No 1 F1 L1 F2 M3 Yes Yes Yes 2 Yes 6 Yes 1 F3 F4 L4 M4 Yes Yes Yes 2 Yes 6 Yes 2 2 F7 H7 M7 Yes Yes Yes 2 Yes 8 Yes 2 2 1 Microcontroller Clock Output refer to Section 8 2 Microcontroller clock output MCO on page 87 2 Depends on package size Check availability in the Pin Allocation Table in the r...

Page 117: ...2 Added Table 1 Applicable products 26 Jan 2021 3 Updated Section 1 2 Software versions Section 2 1 1 Hardware kits Figure 5 Discovery board example Added Section 1 1 General information Section 2 4 2 Wiki platform Section 2 4 3 Github Figure 2 Development tools overview Figure 4 STM32 Nucleo 144 structure Figure 15 STM32Cube monitor Figure 14 STM32Cube programmer ...

Page 118: ...sers are solely responsible for the choice selection and use of ST products and ST assumes no liability for application assistance or the design of Purchasers products No license express or implied to any intellectual property right is granted by ST herein Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product ST...

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