REMOTE PROGRAMMING
4-10
STATUS BYTE DEFINITIONS
The SR715/720 reports on its status by means of three status bytes: the serial poll byte, the standard status
byte, and the LCR status byte.
On power on the SR715/720 may either clear all of its status enable registers or maintain them in the state
they were in on power down. The action taken is set by the
*
PSC command and allows things such as SRQ
on power up .
SERIAL POLL
bit name
usage
STATUS BYTE
0
Ready
The SR7XX is ready to perform a measurement.
1
unused
2
unused
3
LCR
An unmasked bit in the LCR status register has been set.
4
MAV
The gpib output queue is non-empty
5
ESB
An unmasked bit in the standard status byte has been
set.
6
RQS/MSS
SRQ (Service Request)bit.
7
No Command There are no unexecuted commands in the input
queue
The LCR and ESB bits are set whenever any unmasked bit in their respective status registers is set. A bit is
unmasked by setting the corresponding bit in the corresponding enable register to 1. The Serial Poll Status
bits are not cleared until the condition which set the bit is cleared. Thus, these bits give a constant summary of
the unmasked or enabled status bits. A service request will be generated whenever an unmasked bit in the
Serial Poll register is set. Note that service requests are only produced when the bit is first set and thus any
condition will only produce one service request. Accordingly, if a service request is desired every time an event
occurs the status bit must be cleared between events.
For example, to generate a service request whenever an overrange condition occurs, bit 4 in the LCR Status
Enable register needs to be set. (SENA 16 command). When overrange occurs, bit 4 in the LCR Status Byte
is set. Since bit 4 in the LCR Status Enable Register is set, this will also set bit 3 in the Serial Poll Status Byte.
In order for this to generate a service request, bit 3 in the Serial Poll Enable Register must be set (
*
SRE 8
command).
