PulseBlasterESR-PRO
When bits 21-23 are zero, the output flags remain low for the duration of the instruction. When bits
23-21 are from “000” to “101,” the programmed flag values will be outputted for the specified number of
clock cycles. To disable the Short Pulse feature, bits 21 to 23 must be set to “111.”
Figure 17 gives an example of the Short Pulse feature. The example uses a 3 period duration.
This example only shows 4 flags, but all flags will be affected.
NOTE:
The Short Pulse functionality is firmware-dependent. Please inquire with SpinCore
Technologies for upgrades or details. For firmware 17-11, a four clock cycle short pulse requires a
minimum six clock cycle instruction length.
2019/09/26
Figure 17:
Example of the Short Pulse Feature. This example uses a 3 period duration.
This example displays the output of 4 flags, but all flags are affected by the Short Pulse
feature. Timing is done using a 500.0 MHz Clock.
Flag 0
Flag 1
Flag 2
Flag 3
Clock Cycle 1 Clock Cycle 2 Clock Cycle 3 Clock Cycle 4 Clock Cycle 5
Minimum Instruction Length (5 Clock Cycles)
Instruction:
pb_inst (THREE_PERIOD | 0xD, CONTINUE, 0, 10.0 * ns);
2.0 ns
4.0 ns
6.0 ns
8.0 ns
10.0 ns
