– 61 –
Pin No.
Pin Name
I/O
Description
48
DIS CHG
(WAKE UP)
O
Wakeup control signal output “L” output when discharge
49
WDT
I
Watch dog timer reset signal input terminal “H”: reset Not used (fixed at “L”)
50
WAKE UP
I
Wakeup control signal input “H”: wakeup
51
BATT POWER
FAIL
I
Battery power fail detection signal input “L”: battery power fail
52
SS IRQ
I
Interrupt request signal input from the RF unit (RF1) “L” active
53
RESET
I
System reset signal input from the reset signal generator (IC53) “L”: reset
For several hundreds msec. after the power supply rises, “L”: is input, then it changes to “H”
54
XT1
I
Sub system clock input terminal (32.768 kHz) Not used (fixed at “H”)
55
XT2
O
Sub system clock output terminal (32.768 kHz) Not used (open)
56
VSS1
—
Ground terminal
57
CF1
I
Main system clock input terminal (6 MHz)
58
CF2
O
Main system clock output terminal (6 MHz)
59
VDD1
—
Power supply terminal (+3.3V)
60
AN0
I
Not used (open)
61
CHARGE DET
I
Charge detection signal input “L”: charge on
62
AN2
I
Not used (open)
63
LCD CS
O
Chip select signal output to the liquid crystal display module (LCD201) “L” active
64
LCD SDA
I/O
Two-way data bus with the liquid crystal display module (LCD201)