Sony MDS-B5, Service Manual

Page: 44 / 101

MDS-B5
— 46 — — 45 —
5-2. BLOCK DIAGRAMS
—BD SECTION—
OPTICAL PICK-UP BLOCK
(KMS-210A/J-N)
IV-AMP
IV-AMP
J
F
E
6
2
3
6
5
VC
7
1
IC172
BUFFER
48
47
J
I
RF AMP
46 45 44 43
RF AGC
& EQ
BPF
2
3
4
5
6
7
IV AMP
IV AMP
6
8
VC
RV101
E-F
BALANCE
9
1
+2.5V
GENERATOR
VC
16
12
D101
TEMP
AMP
TEMPR
+5V
TEMPI
10
11
Q101
APC
APCREF
LASER ON
SWITCH
LASER
POWER
RV102
PD
14 15
42
TRACKING
ERROR
AMP
AUX
SW
PEAK &
BOTTOM
ABCD
AMP
FOCUS
ERROR
AMP
AT
AMP
30
26
29
27
41
34
38
39
37
35
31
33
SERIAL
PARALLEL
DECODER
17 18 19 20
4
RF AMP
IC101
+5V
HR901
OVER
WRITE
HEAD
4
2
IC122
Q162,163
APC
HIGH
POWER
LD
Q164
HF
MODULE
SWITCH
SLED MOTOR DRIVE,
FOCUS/TRACKING COIL DRIVE
IC151
HEAD
DRIVE
Q181,182
11
14
15
17
18
OVER WRITE
HEAD DRIVE
IC181
1 19
2
5
IC102
4 2
DRIVER
DRIVER
DRIVER
L.F
MOD
H.F
MOD
TRK +
TRK -
TRACKING
COIL
FOCUS
COIL
2
2
M
M101
SLED
MOTOR
2
16
DRIVER
18
17
29
TFDR
TRDR
FRDR
FFDR
SFDR
SRDR
SPFD
DIGITAL SIGNAL PROCESSOR,
DIGITAL SERVO SIGNAL PROCESSOR,
EFM/ACIRC ENCODER/DECODER
IC121
SUBCODE
PROCESSOR,
READER/
GENERATOR
14
EFM
MOD/DEMOD
45
58
DIN
PLL
REGISTER
FILTER
PLL
4
EFM
TIMING
GENERATOR
DIGITAL
CLV
PROCESSOR
TIMING
GENERATOR
&
CLOCK
GENERATOR
AUDIO
DATA
CONTROL
ECC
ENCODER/
DECODER
32K RAM
30
29
27
28
DIGITAL
AUDIO
IN/OUT
20 21 15
31
94
93
82
ADIP
DEMOD
ADIP
DECODER
ANALOG
MUX
68
65
64
66
67
77
76
69 VC
5
A/D
CONV
8
9
10
16
CPU
IF
24
11
4
SERVO
CONTROL
DIRC
7
SERVO
AUTO
SEQUENCER
PROCESSOR
APC
PWM
GEN
5
SERVO DSP/PWM GENERATOR
FOCUS/TRACKING/
SLED SERVO & PWM
6
4
3
2
98
99
DFCT
FOK
SHCK
OFTRK
COUT
6
84
LD
32
33
90
35
BCK
LRCK
FS4
XTAI
SENS
CONTROL
12 85 86 87 89 91 92
6
51 52 49 53
DICV
DIFI DIPD DIFO
SQSY
DQSY
DIN
DOUT
DIDT
DODT
DTO
DTI
C2PO
TRDR TFDR FFDR FRDR SRDR SFDR
SENS
SWDT
SCLK
XLAT
XRST
REC
SRDT
AUX
BOTM
PEAK
ABCD
FE
TE
SE
VC
SPFD
SPRD
60
62
61
63
CLTV
FILI
PCO
FILO
EFMO
RFI
RF
AUX
BOTM
PEAK
ABCD
FE
ADFM
ADIN
TE
SE
TLB
ADFG
XRST
SWDT
SCLK
XLAT
PD
VC
A
B
C
D
E
F
FI
FO
FCS +
FCS -
SLED -
4 2
IC182
7
LDDR
AAPC
I
WRPWR
LIMIT
PROTECT
REFLECT
5
-1
-2
S102-1
PROTECT
S102-2
REFLECT
S101
LIMIT IN
EEP ROM
IC171
6
5 SDA
SCL SDA
SCL
WRPWR
SHCK
FOK
SQSY
SCTX
SWDT
SCLK
XLAT
SRDT
SENS
LRCK
BCK
C2PO
DATA
XRST
LDON
MOD
REC
09
DAPC
30
14
15
4
23
21
10
12
27
25
25
23
22
P-P
TFIL
THID
TENV
VC
DRIVER
10
13
15
4 3 9 16
1
21
22
20
COM
W
V
U
M102
SPINDLE MOTOR
SPINDLE MOTOR
DRIVER
IC201
FG
SPRD
VS
+5V
+
-
FG
DOUT
M
LOUT
LIN
INSW
OUTSW
CHKIN
M191
LOADING MOTOR
S192
LOAD IN DET
S191
LOAD OUT DET
S193
CHUCKING IN
DET
DIGITAL
SECTION
(Page 47)
A
SLED +
SPDL -
6
PSB
3
9
C B
D A
• Signal path
:PB
:REC
:PB (DIGITAL IN)
:REC (DIGITAL OUT)
DODT
34
XTAO
32
33
90
35
BCK
X120
22.5792MHz
DIGITAL
SECTION
(Page 47)
A
DUPLICATION
SECTION
(Page 49)
B
REMOTE
SECTION
(Page 52)
C