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HCD-GZR5D
73
Pin No.
Pin Name
I/O
Description
57
I-AUDIO-LEVEL
I
Audio signal level detection signal input Not used.
58
I-TP-STATE
I
Tape status signal input
59 to 63
NC
–
Not used. (Connect to ground.)
64
I-3.3V-MONI
I
MTK power voltage detection signal input
65
I-KEY3
I
Key signal input 3 (A/D input)
66
I-KEY2
I
Key signal input 2 (A/D input)
67
I-KEY1
I
Key signal input 1 (A/D input)
68
O-LED-STBY
O
Standby LED drive signal outpt Not used.
69
O-LCD-INH
O
Inhibit signal output to LED driver
70
O-LCD-CLK
O
Serial clock signal output to LCD driver
71
O-LCD-CE
O
Chip enable signal output to LCD driver
72
O-LCD-DATA
O
Serial data signal output to LCD driver
73
I-VOL-A
I
Jog dial A-pulse input from the VOLUME rotary encoder
74
I-VOL-B
I
Jog dial B-pulse input from the VOLUME rotary encoder
75
O-LCD-MODE
O
Mode signal output to LCD driver
76
I-MIC-DETECT
I
Microphone connection detection signal input
77
I-HP-DETECT
I
Headphone connection detection signal input
78
O-POWER
O
Main power control signal output
79
O-MTK-POWER
O
MTK power control signal output
80
O-LCD-BKL
O
LCD backlight LED control signal output
81
I-REM
I
Remote control receiver sircs signal input
82
O-TC-M
O
TC motor control signal outpt Not used.
83
I-KEY-WAKE-UP
I
Standby-key interrupt signal input
84
O-VIDEO-MUTE
O
Video output muting signal output
85
O-USB-REC.M
O
USB analog recoading muting control signal output
86, 87
NC
–
Not used. (Connect to ground.)
88
NC
–
Not used. (Open)
89
SI/SO
I/O
Serial data signal input/output
90
RESET
I
System reset signal input
91
XT2
I
Sub system clock input (32.768 kHz)
92
XT1
O
Sub system clock output (32.768 kHz)
93
FLMD0
I
FL mode setting input
94
X2
I
Main system clock input (20 MHz)
95
X1
O
Main system clock output (20 MHz)
96
REGC
–
Regulator ripple capacitor connecting
97
VSS
–
Ground pin
98
EVSS
–
Ground pin
99
VDD
–
Power supply pin (+3.3 V)
100
EVDD0
–
Power supply pin (+3.3 V)
Summary of Contents for CDM74HF-DVBU101
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