
11
Figure 2.6.
Digital outputs electrical schematic.
Figure 2.7.
Analog input electrical schematic.
GPO1
GPO_COM
(200 mA, 60 VDC tolerant)
From
μ
C
From
μ
C
From
μ
C
From
μ
C
330
Ω
330
Ω
330
Ω
330
Ω
GPO2
GPO3
GPO4/STO_FB
(200 mA, 60 VDC tolerant)
(200 mA, 60 VDC tolerant)
(200 mA, 60 VDC tolerant)
(200 mA, 60 VDC tolerant)
Internal to CBC
(0
–
5VDC)
AI
10.33 k
Ω
20 k
Ω
To
μ
C ADC
(10-bit)
1 nF
Internal to CBC
Summary of Contents for CBC-EIP
Page 1: ...CBC EIP USER MANUAL Version 1 1...
Page 23: ...23 Ladder logic example...
Page 29: ...29 Ladder logic Example...
Page 34: ...34...
Page 35: ...35...
Page 37: ...37...