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Rev. 0.2
10.14. ADC RST Header (JP16)
This header provides access to the ADC reset pin. Install a shorting block on JP16 to allow the CP2130 to control
the ADC reset pin via GPIO.7. See Table 12 for the ADC reset header pin definitions.
10.15. Event Counter Input Header (JP17)
The CP2130 GPIO.4 / CS4 / EVTCNTR pin can be configured to count edges/pulses on one of two signals:
Event Button (Short Pins 1–2 on JP17)—Count events from the event button.
GPIO.5 / CS5 / CLKOUT (Short Pins 2–3 on JP17)—Count events from the GPIO.5 / CS5 / CLKOUT
signal.
See Table 13 for the event counter input header pin definitions.
10.16. RTR Button Header (JP18)
This header provides access to the RTR button signal. Install a shorting block on JP18 to connect the RTR button
to the CP2130 GPIO.3 / CS3 / RTR pin. See Table 14 for the RTR button header pin definitions.
Table 12. ADC Reset Header Pin Definitions
Pin #
Definitions
1
GPIO.7 / CS7
2
ADC RST
Table 13. Event Counter Input Header Pin Definitions
Pin #
Definitions
1
EVENT Button
2
GPIO.4 / CS4 / EVTCNTR
3
GPIO.5 / CS5 / CLKOUT
Table 14. RTR Header Pin Definitions
Pin #
Definitions
1
RTR Button
2
GPIO.3 / CS3 / RTR
