CP2130-EK
Rev. 0.2
25
10.10. ADC Channel Input Header (JP10)
This header provides access to the ADC channel inputs (AIN0, AIN1, AIN2). Table 8 lists the ADC analog inputs
corresponding to each header position.
10.11. ADC Chip-Select Header (JP11)
This header provides access to the ADC enable pin. Install a shorting block on JP11 to enable the ADC using the
CP2130 CS0 pin. See Table 9 for the ADC chip-select header pin definitions.
10.12. EEPROM VDD Header (JP12)
This header provides access to the EEPROM VDD pin. Install a shorting block on JP12 to provide power to the
EEPROM from VIO. See Table 10 for the EEPROM VDD header pin definitions.
10.13. EEPROM Chip-Select Header (JP13)
This header provides access to the EEPROM chip-select pin. Install a shorting block on JP13 to connect the
CP2130 CS2 pin to the EEPROM chip-select pin. See Table 11 for the EEPROM chip select header pin definitions.
Table 8. ADC Channel Input Header Locations
Analog Source
Analog Input
Pins
Potentiometer
AIN0
JP10[1:2]
Temperature Sensor
AIN1
JP10[3:4]
GPIO.5 / CS5 / CLKOUT
AIN2
JP10[5:6]
Table 9. ADC Chip-Select Header Pin Definitions
Pin #
Definitions
1
ADC Enable
2
GPIO.0 / CS0
Table 10. EEPROM VDD Header Pin Definitions
Pin #
Definitions
1
VIO
2
EEPROM VDD
Table 11. EEPROM Chip-Select Header Pin Definitions
Pin #
Definitions
1
ADC Enable
2
GPIO.2 / CS2
