LC-32/40/46LE600E/RU/S
6 – 10
Control Pins
54
CSCL
I
Local Configuration/Status I2C Clock. Chip configuration/status is accessed via this I2C port.
This pin is a true open drain, so it does not pull to ground if power is not applied.
53
CSDA
I/O
Local Configuration/Status I2C Data. Chip configuration/status is accessed via this I2C port.
This pin is a true open drain, so it does not pull to ground if power is not applied.
48
DSCL4
I
DDC I2C Clock for VGA port. HDCP KSV, Aa, and Ri values are exchanged over this I2C port during authen-
tication. This pin is a true open drain, so it does not pull to ground if power is not applied.
The R4PWR5V (VREF) pad will provide a reference voltage for the PROT input pin.
47
DSDA4
I/O
DDC I2C Data for VGA port. HDCP KSV, Aa, and Ri values are exchanged over this I2C port during authen-
tication. This pin is a true open drain, so it does not pull to ground if power is not applied.
The R4PWR5V (VREF) pad will provide a reference voltage for the PROT input pin.
Configuration Pins
55
TPWR_CI2CA
I/O
I2C Slave Address input/Transmit Power Sense Output. When RESET# is LOW, this pin is used as an input
to latch the I2C sub _address. The level on this pin is latched when the RESET# pin transition from LOW to
HIGH. When RESET# is HIGH, this pin is used as the TPWR output, indicating that the receive port has 5V
present.
52
INT
O
Interrupt Output.
This is an open_drain output and requires an external pull_up resister.
10
RSVD
—
When SBVCC (pin38) = 5V, RSVD pin #10 must be tied to GND with less than 10K resistor.
When SBVCC (pin38) = 3.3V, RSVD pin #10 must be tied to GND with 1M ohm resistor.
28
RSVD
—
These pins must be tied to GND during normal operation.
CEC Pins
50
CEC_A
I/O
HDMI compliant CEC I/O used for interfacing to CEC devices. The signal is electrically compliant with CEC
specification. This pin connects to the CEC signal of all HDMI connectors in the system. As an input, the pin
acts as a LVTTL, Schmitt triggered input and is 5V tolerant. As an output, the pin acts as an NMOS driver
with resistive pull-up. This pin has an internal pull-up resistor.
51
CEC_D
I/O
This pin is configurable through NVRAM. For CEC_D use, this pin interfaces to the CEC master. Usually
connected to Micro-controller.
Power and Ground Pins
9,27,64 VCC33
—
TMDS Core VCC. Must be supplied at 3.3V
37
MICOM_VCC33
—
During normal mode, this pin provides 3.3V power to external micro-controller. Maximum output current is
30mA.
38
SBVCC
—
Local Power from TV.
When SBVCC (pin38) = 5V, RSVD pin #10 must be tied to GND with less than 10K resistor.
When SBVCC (pin38) = 3.3V, RSVD pin #10 must be tied to GND with 1M ohm resistor.
ePad
Epad
—
ePad must be connected to ground.
All ground planes, analog and digital, must be tied together to the ePad, which must be connected to ground.
Pin No.
Pin Name
I/O
Pin Function
Summary of Contents for Aquos LC-32LE600E
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Page 62: ...LC 32 40 46LE600E RU S 6 16 2 12 IC8401 RH iXC721WJQZQ 2 12 1 Block Diagram ...
Page 75: ...LC 32 40 46LE600E RU S 7 2 2 OVERALL WIRING DIAGRAM LC 40LE600E RU S ...
Page 76: ...LC 32 40 46LE600E RU S 7 3 3 OVERALL WIRING DIAGRAM LC 46LE600E RU S ...
Page 77: ...LC 32 40 46LE600E RU S 7 4 4 SYSTEM BLOCK DIAGRAM LC 32LE600E RU S ...
Page 78: ...LC 32 40 46LE600E RU S 7 5 5 SYSTEM BLOCK DIAGRAM LC 40LE600E RU S ...
Page 79: ...LC 32 40 46LE600E RU S 7 6 6 SYSTEM BLOCK DIAGRAM LC 46LE600E RU S ...
Page 95: ...LC 32 40 46LE600E RU S 9 12 ...