No.14S056-01
15
STC-CMC120APCL, STC-CMB120APCL
Specifications and Users guide
4 Camera Output Timing Charts
4.1 Horizontal Timings (CMC120APCL)
For further details, please refer to section:
V
ERTICAL
T
IMINGS
.
Highs Speed Clock and Low Speed Clock exist as the Pixel Clock.
4.1.1 10 Taps (1X10-1Y) / Horizontal
:
4,090 pixels
1 CLK = 11.764 nseconds (85MHz)
Video out
(Tap1:DA)
LVAL
Horizontal
blanking
One horizontal (1H)
Video output
3
13
23
6
16
26
5
15
25
9
19
29
8
18
28
10
20
30
7
17
27
4
14
24
11
21
31
12
22
32
4062
4072
4082
4064
4074
4084
4068
4078
4088
4061
4071
4081
4063
4073
4083
4065
4075
4085
4066
4076
4086
4069
4079
4089
4067
4077
4087
4070
4080
4090
Video out
(Tap2:DB)
Video out
(Tap6:DF)
Video out
(Tap5:DE)
Video out
(Tap4:DD)
Video out
(Tap3:DC)
Video out
(Tap7:DG)
Video out
(Tap8:DH)
Video out
(Tap9:DI)
Video out
(Tap10:DJ)
409 CLK
Summary of Contents for CL Series
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