Q7-B03
Q7-B03 User Manual - Rev. First Edition: 1.0 - Last Edition: 1.1 - Author: S.B. - Reviewed by G.G. Copyright © 2017 SECO S.r.l.
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PCIE_RST#: Reset Signal that is sent from Qseven
®
Module to any PCI-e device available on the carrier board. It is a 3.3V_A active-low signal; it can be used
directly to drive externally a single RESET Signal. In case Reset signal is needed for multiple devices, it is recommended to provide for a buffer on the carrier board.
The four PCI-e lanes available on the Qseven
®
card edge connector can be managed as a single PCI-e x4 port, 2 PCI-e x2 ports, one PCI-e x2 + 2 PCI-e ports x1
or 4 PCI-e x1 ports.
However, the Intel
®
family of SOCs formerly coded as Apollo Lake can manage up to four root ports only, and one PCI-e root port is necessary to manage the Intel
®
I21x Gigabit Ethernet controller. For this reason, it is not possible to manage the four PCI-e lanes in the 4 PCI-e x 1 configuration without disabling the Intel
®
I21x Gigabit Ethernet controller (Root port #1).
In the following table are shown the possible groupings allowed of the PCI-e lanes available on the Qseven
®
card edge connector:
Allowed groupings
Lane #0
Lane #1
Lane #2
Lane #3
1 PCI-e x 4 port
2 PCI- e x2
1 PCI-e x 2 + 2 PCI-e x1
4 PCI-e x1
Not available
Please also be aware that this grouping cannot be changed dynamically, it is a fixed feature of the BIOS.
Unless differently specified, all the Q7-
-
first three lanes will
be usable (the fourth PCI-e root port is used to manage the Intel
®
I21x Gigabit Ethernet controller). When ordering a Q7-B03 module, please take care of
specifying which is the desired PCI-e grouping.
