RTL8201(L)
2002-01-18
Rev.1.04
8
0:<12> Auto
Negotiation
Enable
Auto Negotiation Enable:
Auto-negotiation can be disabled by either
hardware or software control. This bit can enable/disable the Nway
auto-negotiation function. If the ANEN input pin is driven to a logic ‘0’,
Auto-negotiation is disabled by software control. When
Auto-negotiation is disabled in this manner, writing a ‘1’ to the same bit
of the control register or resetting the chip will re-enable
Auto-negotiation. Writing to this bit has no effect when
Auto-negotiation has been disabled by hardware control. When read,
this bit will return the value most recently written to this location, or ‘1’
if it has not been written since the last chip reset.
1: Enable auto-negotiation; bits 0:<13> and 0:<8> will be ignored
0: Disable auto-negotiation; bits 0:<13> and 0:<8> will determine the
link speed and the data transfer mode, respectively
When 100Base-FX mode is enabled, this bit=0, and this bit is read only.
1, RW
0:<11> Power
Down
Power Down:
The RTL8201L supports a low power mode which is
intended to decrease power consumption. This bit turns down the power
of the PHY chip including internal crystal oscillator circuit. The MDC,
MDIO is still alive for accessing the MAC.
Writing a ‘1’ will enable power down mode, and writing a ‘0’ will
return the RTL8201L to normal operation. When read, this register will
return a ‘1’ when in power down mode, and a ‘0’ during normal
operation.
1: Power down
0: Normal operation
0, RW
0:<10> Reserved
Reserved:
Ignore the output of the RTL8201L when these bits are read.
0:<9> Restart
Auto
Negotiation
Restart Auto Negotiation:
Bit 9 is a self-clearing bit that allows the
Nway auto-negotiation process to be restarted, regardless of the current
status of the Auto-negotiation state machine. In order for this bit to have
an effect, Auto-negotiation must be enabled. Writing a ‘1’ to this bit
restarts Auto-negotiation while writing a ‘0’ to this bit has no effect.
When this bit is read, it will always return a ‘0’.
1: Re-start auto-negotiation
0: Normal operation
0, RW
0:<8> Duplex
Mode
Duplex Mode:
By default, the RTL8201L powers up in half duplex
mode. The chip can be forced into full duplex mode by writing a ‘1’ to
bit 8 while Auto-negotiation is disabled. Half duplex mode can be
resumed either by writing a ‘0’ to bit 8 or by resetting the chip. When
Nway is enabled, this bit reflects the results of the Auto-negotiation, and
is in a read only mode. When Nway is disabled, this bit can be set
through the SMI, and is in a read/write mode. When 100FX is enabled,
this bit can be set through the SMI or FX_DUPLEX pin and is in a
read/write mode. This bit sets the duplex mode if auto negotiation is
disabled (bit 0:<12>=0).
1: Full duplex
0: Normal operation
After auto negotiation completes, this bit will reflect the duplex status.
1, RW
0:<7:0> Reserved
Reserved Bits:
All reserved MII register bits must be written as ‘0’ at
all times. Ignore the RTL8201L output when these bits are read.
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